Computer graphics processing and selective visual display system – Display driving control circuitry
Reexamination Certificate
2006-05-18
2009-10-13
Lewis, David L (Department: 2629)
Computer graphics processing and selective visual display system
Display driving control circuitry
C345S211000, C345S212000, C345S213000, C327S115000, C327S116000, C327S119000, C327S148000, C327S152000, C327S291000
Reexamination Certificate
active
07602386
ABSTRACT:
A reference clock signal generation circuit for generating a reference clock signal for a charge-pump operation which raises or lowers a voltage includes a clock signal generation circuit which generates a reference clock signal having one of first to nth (n is an integer of two or more) frequencies, a wait time setting register in which a value corresponding to a wait time is set, and a frequency setting register in which a value corresponding to one of the first to nth frequencies is set. The clock signal generation circuit generates the reference clock signal having a predetermined frequency in a start period from start of the charge-pump operation to completion of the wait time, and generates the reference clock signal having a frequency corresponding to the value set in the frequency setting register in an operation period after the start period.
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Ketema Benyam
Lewis David L
Oliff & Berridg,e PLC
Seiko Epson Corporation
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