Redundancy substitution method, semiconductor memory device...

Details Redundancy substitution method, semiconductor memory device... Redundancy substitution method, semiconductor memory device...

2007-09-04

2007-09-04

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185200

Reexamination Certificate

active

11311485

ABSTRACT:
A redundancy substitution method for memory cells within an electrically writable and erasable semiconductor memory device, includes detecting a memory cell having a tendency of a charge loss and/or a charge gain, by use of a charge loss detecting reference cell and/or a charge gain detecting reference cell. The charge loss detecting reference cell has a threshold value set between a threshold value of a read reference cell and a threshold value of a write verify reference cell that is higher than that of the read reference cell, and the charge gain detecting reference cell has a threshold value set between the threshold value of the read reference cell and a threshold value of an erase verify reference cell that is lower than that of the read reference cell. The method subjects a memory cell whose tendency of the charge loss and/or the charge gain is detected to a redundancy substitution.

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patent: 7126850 (2006-10-01), Tatsukawa et al.
patent: 7180782 (2007-02-01), Yu et al.
patent: 9-204796 (1997-08-01), None
patent: 2004-319034 (2004-11-01), None

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