Redundancy circuit for semiconductor memory device

Details Redundancy circuit for semiconductor memory device Redundancy circuit for semiconductor memory device

1994-10-11

1996-01-02

Yoo, Do Hyun

Static information storage and retrieval

Floating gate

Particular connection

365185, 36518909, 365226, 36518523, 3651852, G11C 700, G11C 2900

Patent

active

054814987

ABSTRACT:
A memory redundancy circuit using FLOTOX transistors instead of conventional link fuses and thus capable of redundancy programming even after the packaging of the chip. The redundancy circuit is capable of generating spare signals in order to use spare memory cells for particular addresses. The circuit includes: a reference line having a certain voltage level for generating spare signals; a reference voltage supplying circuit for supplying the required voltage to the reference line; two or more FLOTOX transistors connected to the reference line; and high voltage driving circuits provided for the FLOTOX transistors, and connected to address lines in such a manner as to supply the required voltage to the gates of the FLOTOX transistors for programming.

REFERENCES:
patent: 4794568 (1988-12-01), Lim et al.
patent: 5233566 (1993-08-01), Imamiya et al.

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