Reduction of the probability of interlevel oxide failures by...

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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C174S250000, C361S794000

Reexamination Certificate

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06414249

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to integrated circuit layout and semiconductor electronics, and more particularly to multi-level metal technology and the reduction of the probability of interlevel oxide failures through a modified bus design.
BACKGROUND OF THE INVENTION
The phenomenon of field emission was discovered in the 1950's, and extensive research by many individuals has developed the technology to the extent that its use in inexpensive, low-power, high-resolution, high-contrast, full-color flat displays appears promising. Advances in field emission device (“FED”) display technology are disclosed in U.S. Pat. No. 3,755,704, “Field Emission Cathode Structures and Devices Utilizing Such Structures,” issued Aug. 28, 1973, to C. A. Spindt et al.; U.S. Pat. No. 4,940,916, “Electron Source with Micropoint Emissive Cathodes and Display Means by Cathodoluminescence Excited by Field Emission Using Said Source,” issued Jul. 10, 1990 to Michel Borel et al.; U.S. Pat. No. 5,194,780, “Electron Source with Microtip Emissive Cathodes,” issued Mar. 16, 1993 to Robert Meyer; and U.S. Pat. No. 5,225,820, “Microtip Trichromatic Fluorescent Screen,” issued Jul. 6, 1993, to Jean-Frédéric Clerc. These patents are incorporated by reference into the present application.
A FED flat panel display arrangement is disclosed in U.S. Pat. No. 4,857,799, “Matrix-Addressed Flat Panel Display,” issued Aug. 15, 1989, to Charles A. Spindt et al., incorporated herein by reference. This arrangement includes a matrix array of individually addressable light generating means of the cathodoluminescent type having electron emitting cathodes combined with an anode which is a luminescing means of the CRT type which reacts to electron bombardment by emitting visible light. Each cathode is itself an array of thin film field emission cathodes on a backing plate, and the luminescing means is provided as a phosphor coating on a transparent face plate which is closely spaced to the cathodes.
The emitter backing plate disclosed in the Spindt et al. ('799) patent includes a large number of parallel vertical conductive cathode electrodes which extend across the backing plate and are individually addressable. A multiplicity of spaced-apart electron emitting tips project upwardly from each vertical cathode electrode on the backing plate and extend perpendicularly away from the backing plate. An electrically conductive gate electrode arrangement is positioned adjacent to the tips to generate and control the electron emission. The gate electrode arrangement comprises a large number of individually addressable, parallel horizontal electrode stripes which extend along the backing plate orthogonal to the cathode electrodes, and which include apertures through which emitted electrons may pass. Each gate electrode is common to a full row of pixels extending across the front face of the backing plate and is electrically isolated from the arrangement of cathode electrodes. The emitter back plate and the anode face plate are parallel and spaced apart.
The anode is a thin film of an electrically conductive transparent material, such as indium tin oxide, which covers the interior surface of the face plate. Deposited onto this metal layer is a luminescent material, such as phosphor, that emits light when bombarded by electrons.
The array of emitting tips are activated by addressing the orthogonally related cathode gate electrodes in a generally conventional matrix-addressing scheme. The appropriate cathode electrodes of the display along a selected stripe, such as along one column, are energized while the remaining cathode electrodes are not energized. Gate electrodes of a selected stripe orthogonal to the selected cathode electrode are also energized while the remaining gate electrodes are not energized, with the result that the emitting tips of a pixel at the intersection of the selected cathode and gate electrodes will be simultaneously energized, emitting electrons so as to provide the desired pixel display.
The Spindt et al. patent teaches that it is preferable that an entire row of pixels be simultaneously energized, rather than energization of individual pixels. According to this scheme, sequential lines are energized to provide a display frame, as opposed to sequential energization of individual pixels in a raster scan manner.
The Clerc ('820) patent discloses a trichromatic FED flat panel display having a first substrate comprising the cathode and gate electrodes, and having a second substrate facing the first, including regularly spaced, parallel conductive stripes comprising the anode electrode. These stripes are alternately covered by a first material luminescing in the red, a second material luminescing in the green, and a third material luminescing in the blue, the conductive stripes covered by the same luminescent material being electrically interconnected.
Today, a conventional FED is manufactured by combining the teachings of many practitioners, including the teachings of the Spindt et al. ('799) and Clerc ('820) patents. Referring initially to
FIG. 1
, there is shown, in cross-sectional view, a portion of an illustrative FED in which the present invention may be incorporated. In this embodiment, the FED comprises an anode plate
1
having an electroluminescent phosphor coating
3
facing an emitter plate
2
, the phosphor coating
3
being observed from the side opposite to its excitation.
More specifically, the FED of
FIG. 1
comprises a cathodoluminescent anode plate
1
and an electron emitter (or cathode) plate
2
. A cathode portion of emitter plate
2
includes conductors
9
formed on an insulating substrate
10
, an electrically resistive layer
8
which is formed on substrate
10
and overlaying the conductors
9
, and a multiplicity of electrically conductive microtips
5
formed on the resistive layer
8
. In this example, the conductors
9
comprise a mesh structure, and microtip emitters
5
are configured as a matrix within the mesh spacings. Microtips
5
take the shape of cones which are formed within apertures through conductive layer
6
and insulating layer
7
.
A gate electrode comprises the layer of the electrically conductive material
6
which is deposited on the insulating layer
7
. The thicknesses of gate electrode layer
6
and insulating layer
7
are chosen in such a way that the apex of each microtip
5
is substantially level with the electrically conductive gate electrode layer
6
. Conductive layer
6
may be in the form of a continuous layer across the surface of substrate
10
; alternatively, it may comprise conductive bands across the surface of substrate
10
.
Anode plate
1
comprises a transparent, electrically conductive film
12
deposited on a transparent planar support
13
, such as glass, which is positioned facing gate electrode
6
and parallel thereto, the conductive film
12
being deposited on the surface of the glass support
13
directly facing gate electrode
6
. Conductive film
12
may be in the form of a continuous layer across the surface of the glass support
13
; alternatively, it may be in the form of electrically isolated stripes comprising three series of parallel conductive bands across the surface of the glass support
13
, as shown in FIG.
1
and as taught in U.S. Pat. No. 5,225,820, to Clerc. By way of example, a suitable material for use as conductive film
12
may be indium-tin-oxide (ITO), which is optically transparent and electrically conductive. Anode plate
1
also comprises a cathodoluminescent phosphor coating
3
, deposited over conductive film
12
so as to be directly facing and immediately adjacent gate electrode
6
. In the Clerc patent, the conductive bands of each series are covered with a particulate phosphor coating which luminesces in one of the three primary colors, red, blue and green
3
R
,
3
B
,
3
G
.
Selected groupings of microtip emitters
5
of the above-described structure are energized by applying a negative potential to cathode electrode
9
relative to the

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