Reduction of parasitic bipolar effects in integrated circuits em

Details Reduction of parasitic bipolar effects in integrated circuits em Reduction of parasitic bipolar effects in integrated circuits em

1976-02-23

1977-07-12

James, Andrew J.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

357 23, 357 41, 307304, H01L 2702, H01L 2978, H03K 3353

Patent

active

040358267

ABSTRACT:
Low resistance substrate contacts extending through the source region of an insulated gate field effect transistor (IGFET) will reduce parasitic bipolar effects in an integrated circuit. Such low resistance contacts may be made by diffusing impurities of a type opposite to the conductivity type of the source region through spaced areas of the source region thereby to provide low resistance paths between all points in the source and the underlying substrate. The low resistance contacts prevent large voltage drops in the substrate underlying the source thereby preventing "latch-up" of the parasitic devices formed during the manufacture of the integrated circuit.

REFERENCES:
patent: 3821781 (1974-06-01), Chang et al.
Non-Latching Integrated Circuits; RCA Technical Notes; by William Dennehy; MO876, Feb. 12, 1971, pp. 1 to 4.

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