Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Amplitude control
Reexamination Certificate
2000-10-30
2002-12-03
Cunningham, Terry D. (Department: 2811)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Amplitude control
C327S543000
Reexamination Certificate
active
06489827
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus and a method for reducing offset voltage in a current mirror, thereby enabling the two currents being “mirrored” to more closely match one another, and, as a direct result, improving the performance of circuits that use a current mirror as a component.
2. Description of the Related Art
As is well known in the art, current sources are widely used in microelectronic circuitry as biasing elements and as load devices for various types of amplifier stages. As is also well known, such use of current sources in biasing arrangements proves advantageous in the superior insensitivity of circuit performance to power supply variations and to changes in temperature which are often present. When used as a load element in transistor amplifier stages, furthermore, the high incremental resistance exhibited by the current source leads to high voltage gains at low power supply voltages. Because of these characteristics, a desirable application for a current source is in the digital-to-analog converter. In such uses, a current mirror employing metal-oxide-semiconductor field effect transistors (MOSFETs) is commonly employed, offering an accurate reproduction of the reference current. Current mirrors are very well known in the literature and are the subject of many patents. For example, see U.S. Pat. Nos. 6,127,841; 6,124,705; 6,118,395; 6,087,819; 6,034,518; and 5,945,873, the contents of each of which are hereby incorporated by reference.
Referring to
FIG. 1
, a circuit diagram for a current mirror
100
uses four MOSFETs
105
,
110
,
115
,
120
and a current source
125
. Ideally, the current I
1
passing through MOSFETs
105
and
110
on the left half of the current mirror is equal to the current I
2
passing through MOSFETs
115
and
120
on the right half of the current mirror (hence, the term “mirror”).
However, I
1
≠I
2
, due to what are known in the art as secondary effects. Even when transistors are designed to be identical to each other, there are always slight differences, caused by minor manufacturing variations or defects. Such variations are more pronounced when the transistors use very small geometries. Referring to
FIG. 2
, this phenomenon is represented in a circuit diagram in which a small offset voltage V
offset1
205
between MOSFET
105
and MOSFET
115
is a voltage difference between the two halves of the current mirror. This offset voltage
205
results in a difference between the currents I
1
and I
2
. A similar small offset voltage V
offset2
exists between MOSFET
110
and MOSFET
120
. Atypical range of values for an offset voltage is approximately 10-50 mV.
The magnitudes of the offset voltages are inversely proportional to the areas of the respective transistors. Thus, the smaller the transistor, the larger the offset voltage. One method of reducing the offset voltage would be to use larger transistors. However, this method has drawbacks. One drawback is that a larger transistor area also directly results in a larger source-to-gate capacitance. Capacitance is inversely proportional to frequency, which is directly related to the speed of the circuit. Hence, if a transistor having a larger area is used in order to reduce the offset voltage, the entire circuit is forced to operate more slowly.
SUMMARY OF THE INVENTION
The present invention is intended to overcome the drawbacks noted above and provides a current mirror with reduced offset voltage while maintaining overall system performance and speed.
According to one aspect of the present invention, a current mirror includes at least two pairs of metal oxide semiconductor field effect transistors (MOSFETs). Each MOSFET includes a gate, a source, and a drain, and each MOSFET operates according to a set of characteristic curves, wherein each curve includes a linear region and a saturation region. Each pair of MOSFETs is configured in series. A first current passes through the first pair of MOSFETs, and a second current passes through the second pair of MOSFETs. The first MOSFET of the first pair is electrically connected to the first MOSFET of the second pair, and the second MOSFET of the first pair is electrically connected to the second MOSFET of the second pair. A voltage difference between the first MOSFET of the first pair and the first MOSFET of the second pair is a first offset voltage, and a voltage difference between the second MOSFET of the first pair and the second MOSFET of the second pair is a second offset voltage. The second offset voltage is reduced by simultaneously operating the second MOSFET of the first pair in the linear region of one of its characteristic curves and operating the second MOSFET of the second pair in the linear region of one of its characteristic curves.
The current mirror may be implemented as part of a read channel for a hard disk drive, or as a biasing element in a larger electrical circuit. It may be used as an operational amplifier or as an analog-to-digital converter. A method for reducing offset voltage in a current mirror circuit may also be realized.
REFERENCES:
patent: 4831323 (1989-05-01), Melbert
patent: 5015942 (1991-05-01), Kolanko
patent: 5410242 (1995-04-01), Bittner
patent: 5486787 (1996-01-01), Maekawa et al.
patent: 5523717 (1996-06-01), Kimura
patent: 5545973 (1996-08-01), Johnson
patent: 5672960 (1997-09-01), Manaresi et al.
patent: 5757230 (1998-05-01), Mangelsdorf
patent: 5793239 (1998-08-01), Kovacs et al.
patent: 5945873 (1999-08-01), Antone et al.
patent: 6034518 (2000-03-01), Yuasa
patent: 6087819 (2000-07-01), Kuroda
patent: 6118395 (2000-09-01), Kim
patent: 6124705 (2000-09-01), Kwong
patent: 6127841 (2000-10-01), Roohparvar
patent: 6172556 (2001-01-01), Prentice
Cunningham Terry D.
Janofsky Eric B.
Katten Muchin Zavis & Rosenman
Marvell International Ltd.
LandOfFree
Reduction of offset voltage in current mirror circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Reduction of offset voltage in current mirror circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reduction of offset voltage in current mirror circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2989421