Reduction of digital filter delay

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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08078659

ABSTRACT:
An apparatus for reducing a digital filter delay includes means for determining the magnitude response of a desired filter. Means form the real cepstrum of this magnitude response. Means transform the real cepstrum into a complex cepstrum of a corresponding minimum-phase filter having the same magnitude response as the desired filter. A filter applies a smoothly decaying shaping window to the complex cepstrum. Means transform the shaped complex cepstrum into an estimated minimum-phase filter.

REFERENCES:
patent: 7774396 (2010-08-01), Dickson et al.
patent: 2002/0184010 (2002-12-01), Eriksson et al.
patent: 2007/0118367 (2007-05-01), Dickson et al.
patent: 2009/0017784 (2009-01-01), Dickson et al.
patent: 2010/0198899 (2010-08-01), Dickson et al.

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