Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2006-10-31
2011-12-13
Malzahn, David H (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
08078659
ABSTRACT:
An apparatus for reducing a digital filter delay includes means for determining the magnitude response of a desired filter. Means form the real cepstrum of this magnitude response. Means transform the real cepstrum into a complex cepstrum of a corresponding minimum-phase filter having the same magnitude response as the desired filter. A filter applies a smoothly decaying shaping window to the complex cepstrum. Means transform the shaped complex cepstrum into an estimated minimum-phase filter.
REFERENCES:
patent: 7774396 (2010-08-01), Dickson et al.
patent: 2002/0184010 (2002-12-01), Eriksson et al.
patent: 2007/0118367 (2007-05-01), Dickson et al.
patent: 2009/0017784 (2009-01-01), Dickson et al.
patent: 2010/0198899 (2010-08-01), Dickson et al.
Lusk Dan
Trump Tonu
Malzahn David H
Telefonaktiebolaget L M Ericsson (Publ)
LandOfFree
Reduction of digital filter delay does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Reduction of digital filter delay, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reduction of digital filter delay will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4269535