Reducing the natural current limit in a power MOS device by redu

Details Reducing the natural current limit in a power MOS device by redu Reducing the natural current limit in a power MOS device by redu

1994-06-24

1996-07-30

DeBoer, Todd

Electricity: electrical systems and devices

Safety and protection of systems and devices

Voltage regulator protective circuits

361 91, H02H 710

Patent

active

055417990

ABSTRACT:
In accordance with the present invention, an output current limit circuit for protecting a power MOS output device of an integrated circuit from an excessive drain current comprises a power MOS device 110, a means 30 to sense a predetermined trigger current, and a means 20 to reduce a gate-source voltage on MOS output device 110 to a predetermined approximately fixed value. A drain current I.sub.D flows through power MOS device 110 from output terminal 102 in response to the gate-source voltage. A short circuit condition may allow an excessive amount of drain current I.sub.D to flow through output terminal 102. The gate-source voltage is reduced in response to sensing the trigger current. Reducing the gate-source voltage raises a drain-source resistance of MOS device 110 and reduces drain current I.sub.D so that MOS device 110 is not damaged by the short circuit condition.

REFERENCES:
patent: 4021701 (1977-05-01), Davies
patent: 4703390 (1987-10-01), Fay et al.
patent: 4893158 (1990-07-01), Mihara et al.
patent: 5303110 (1994-04-01), Kumagai
PRISM Power IC Design Aspects, Ross Teggatz, Joe Devore, Wayne Chen and Tom Schmidt, TI Technical Journal, vol. 11, No. 2, Mar.-Apr. 1994, pp. 25-36.

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