Reducing sneak currents in virtual ground memory arrays

Details Reducing sneak currents in virtual ground memory arrays Reducing sneak currents in virtual ground memory arrays

2007-10-09

2007-10-09

Pham, Lý Duy (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185140, C365S185280, C365S185290, C365S220000, C711S168000, C711S203000

Reexamination Certificate

active

11167354

ABSTRACT:
In a virtual ground memory array, sneak currents between input/output groups of sensed cells may be reduced by providing at least one column of programmed cells between the input/output groups. The sneak currents may arise when cells in each of two adjacent I/O groups are sensed (or programmed) at the same time.

REFERENCES:
patent: 6324116 (2001-11-01), Noh et al.
patent: 2004/0063283 (2004-04-01), Guterman et al.
patent: 2006/0227616 (2006-10-01), Zhang
patent: 2006/0285421 (2006-12-01), Zhang
Zhang, “Reducing Sneak Currents in Virtual Ground Memory Arrays”, U.S. Appl. No. 11/103,064, Apr. 11, 2005.

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