Reducing power consumption variability of precharge-pulldown...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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C326S083000

Reexamination Certificate

active

06621310

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to integrated circuits, and more particularly, to techniques and circuits for reducing power supply droop and ground bounce oscillations.
BACKGROUND OF THE INVENTION
One of the causes of reduced on-chip power supply is a result of changes in the amount of current drawn from (or dumped to) the on-chip power supply lines. The changes in the amount of current drawn excite oscillations in the inherent inductances in the power delivery lines. These inherent inductances come mainly from the package leads and bond wires. The frequency of these oscillations depends upon a number of factors that vary from package-to-package and chip-to-chip. However, in high-performance integrated circuits, the frequency of operation may be much greater than the frequency of the oscillations on the power supplies. Accordingly, it is important that the circuits on these chips be designed to operate at the smallest voltage differential between a peak in the ground oscillation and a dip in the positive supply oscillation.
If circuits are not designed to operate at the smallest voltage differential between a peak in the ground oscillation and a dip in the positive supply oscillation, transistors may not meet their switch times and the operating frequency must be lowered. Thus, to meet frequency goals, the normal power supply voltage is increased to obtain a minimum acceptable differential between ground peaks and power supply dips. This increased operating voltage increases the integrated circuit's power dissipation. Increased power dissipation can increase the cost of several components of a system including the integrated circuit packaging, heat sink, and the system power supply. Furthermore, increasing the operating voltage tends to decrease the operating lifetime of the part thereby increasing the cost of a systems maintenance and amortized cost.
Accordingly, there is a need in the art for an apparatus and method for reducing the changes in the amount of current drawn on an integrated circuit's powers supplies.
SUMMARY OF THE INVENTION
An embodiment of the invention reduces the changes, or variability, in the amount of current drawn from, or dumped to, the power supplies of an integrated circuit. This, in turn, reduces the magnitudes of the smallest voltage differential between a peak in the ground oscillation and a dip in the positive supply oscillation. It is well adapted for fabrication on integrated circuits and can be particularly effective when used on wide, parallel, precharge-pulldown busses.
Instances of an embodiment of the invention are connected to the wires of a precharge-pulldown bus. Each instance monitors the wire that it is connected to. If the wire has been discharged during the pulldown cycle of the bus, the invention does not consume any current. If, however, the wire was not discharged during the pulldown cycle of the bus, then the invention consumes an amount of current that approximates the amount of current used to precharge that wire had it been discharged. This makes the power consumption to precharge precharge-pulldown busses less data dependent. Making the power consumption less data dependant reduces the overall variability in power consumption and that reduces the magnitude of the smallest voltage differential between a peak in the ground oscillation and a dip in the positive supply oscillation.
Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.


REFERENCES:
patent: 5128555 (1992-07-01), Millman
patent: 5321661 (1994-06-01), Iwakiri et al.
patent: 5650971 (1997-07-01), Longway et al.
patent: 5708625 (1998-01-01), Sato et al.
patent: 5903506 (1999-05-01), Blodgett
patent: 6087872 (2000-07-01), Partovi et al.
Interface Logic Control for a Fully Associate Table, IBM Technical Disclosure Bulletin, Oct. 1989, vol. 32, Issue No. 5B, pp. 415-417.

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