Static information storage and retrieval – Addressing – Sync/clocking
Patent
1988-10-12
1990-06-05
Popek, Joseph A.
Static information storage and retrieval
Addressing
Sync/clocking
365203, G11C 700
Patent
active
049320017
ABSTRACT:
An on-chip semiconductor memory device in which power consumption is significantly decreased by restricting pre-charging of the bit lines to only those clock cycles for which there is a change in word line address.
REFERENCES:
patent: 4612631 (1986-09-01), Ochii
Chow David G. L.
Liu Jack M. S.
Advanced Micro Devices , Inc.
Popek Joseph A.
LandOfFree
Reducing power consumption in on-chip memory devices does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Reducing power consumption in on-chip memory devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reducing power consumption in on-chip memory devices will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-497263