Reducing power consumption in calculators

Details Reducing power consumption in calculators Reducing power consumption in calculators

1974-12-13

1976-03-02

Dildine, Jr., R. Stephen

Registers

Transfer mechanism

Traveling pawl

3401725, 340324R, G06F 738, G06F 104

Patent

active

039419894

ABSTRACT:
Continuous power and a high rate clock are supplied to a calculator while it is in an execute mode and is actually decoding and processing input information, but lower duty cycle power and lower duty cycle clock pulses are supplied during the subsequent display mode, when the only requirement is to maintain and display selected information resulting from the execute cycle, so as to reduce the power consumption rate as compared to the rate during the execute mode. If there is no new execute mode within a selected time interval, the display is turned off and the duty cycle of the power and the clock supplied to the calculator are lowered still further so as to maintain (without displaying) selected stored information but to further reduce the rate of power consumption.

REFERENCES:
patent: 3453601 (1969-07-01), Bogert et al.
patent: 3781852 (1973-12-01), White et al.
patent: 3812489 (1974-05-01), Hirano et al.

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