Reducing power consumption and bus bandwidth requirements in cel

Details Reducing power consumption and bus bandwidth requirements in cel Reducing power consumption and bus bandwidth requirements in cel

1996-12-18

1999-05-25

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Integrated circuit

345202, 345501, 365226, 365227, 365228, 382232, 382233, 382245, 382246, 382426, 382427, 3822611, G09G 500

Patent

active

059073306

ABSTRACT:
A method and apparatus for reducing power consumption and system bus load caused by a display controller in a unified memory system. A compression engine monitors a bus over which display data from the unified memory flows. The compression engine captures and compresses a copy of the display data corresponding to a display frame. The compressed data is stored in a small memory unit. Subsequent refreshes of the display are serviced by a decompression engine. The decompression engine decompresses the compressed data from the small memory unit and provides the decompressed data to the display controller.

REFERENCES:
patent: 5081450 (1992-01-01), Lucas et al.
patent: 5129011 (1992-07-01), Nishikawa et al.
patent: 5335322 (1994-08-01), Mattison
patent: 5706035 (1998-01-01), Tsunoda et al.

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