Reducing leakage current in circuits implemented using CMOS...

Details Reducing leakage current in circuits implemented using CMOS... Reducing leakage current in circuits implemented using CMOS...

2005-02-08

2005-02-08

Phung, Anh (Department: 2824)

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Semiconductive

C365S189011, C365S229000

Reexamination Certificate

active

06853574

ABSTRACT:
Reducing leakage current when a circuit contains a series of CMOS transistors. The probability that each input signal (connecting to the gate terminal of the corresponding CMOS transistor) will be at a logical value which turns off the corresponding CMOS transistor is determined. A CMOS transistor with a high threshold voltage may be connected to receive an input signal with a high probability to reduce the aggregate leakage current in the circuit. The approach may be used in any environments such as synthesis tools and also manual design methodologies.

REFERENCES:
patent: 3761799 (1973-09-01), Shuey
patent: 5051620 (1991-09-01), Burgin
patent: 6255853 (2001-07-01), Houston
patent: 6308312 (2001-10-01), Houston
patent: 6314041 (2001-11-01), Frey
patent: 6519178 (2003-02-01), Alvandpour et al.

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