Reducing floating gate to floating gate coupling effect

Details Reducing floating gate to floating gate coupling effect Reducing floating gate to floating gate coupling effect

2007-06-12

2007-06-12

Lam, David (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185240, C365S185290

Reexamination Certificate

active

11021872

ABSTRACT:
For a non-volatile memory system, compressing the erase threshold voltage distribution into the lowest threshold voltage state will decrease the valid data threshold voltage window. Decreasing the valid data threshold voltage window reduces the floating gate to floating gate coupling effect. The compression can be performed as part of the erase process or part of the programming operation.

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