Reducing flicker noise in two-stage amplifiers

Telecommunications – Transmitter – Noise or interference elimination

Reexamination Certificate

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Details

C455S063100, C455S067130, C455S127300, C455S333000, C330S283000, C330S307000

Reexamination Certificate

active

07433656

ABSTRACT:
A multi-stage amplifier includes first and second amplification stages and a loading stage, all of which generate flicker noise. A degeneration block is operably disposed between circuit common and the loading stage wherein the degeneration block is operable to reduce flicker noise generated by at least one of the loading stage, the first amplification stage and the second amplification stage. The degeneration block further includes at least one active MOSFET operably biased in a linear region to provide a specified resistive value and coupled to receive and conduct the common mode portion of the intermediate stage output signal based upon a gate terminal bias signal. A degeneration block amplifier is operable to generate a replica device bias signal wherein the replica device is operable to set the gate terminal bias signal for the at least one active MOSFET based upon the replica device bias signal.

REFERENCES:
patent: 4570129 (1986-02-01), Milberger
patent: 5880631 (1999-03-01), Sahota
patent: 6229395 (2001-05-01), Kay
patent: 6570446 (2003-05-01), Ling
patent: 6717463 (2004-04-01), Aparin et al.
patent: 6744320 (2004-06-01), Nguyen et al.

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