Reducing cross die variability in an EEPROM array

Details Reducing cross die variability in an EEPROM array Reducing cross die variability in an EEPROM array

2007-11-20

2007-11-20

Tran, Michael (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185250

Reexamination Certificate

active

10873872

ABSTRACT:
In an EEPROM array the cells are pre-charged or pre-erased so that they will respond uniformly to the same read voltage level. By clearly defining the threshold voltage for the cells in their erased states and in their programmed states, it is possible to define more than one read voltage and thus provide cells that an store multiple values and even analog values.

REFERENCES:
patent: 5825782 (1998-10-01), Roohparvar
patent: 6856548 (2005-02-01), Tanzawa et al.

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