Coded data generation or conversion – Digital code to digital code converters – Parallel to serial
Patent
1994-12-15
1998-06-30
Young, Brian K.
Coded data generation or conversion
Digital code to digital code converters
Parallel to serial
H03M 900
Patent
active
057740801
ABSTRACT:
A data transmission system wherein a datastream of digital words is processed in two parallel pipelined datapaths with the logical operations being performed at a clock rate which is a fraction of some other clock rate identified as a main clock rate. The outputs of the datapath logic are directed respectively to T-latch storage registers the outputs of which are directed at the fractional clock rate to corresponding inputs of a multiplexer serving to combine the two datastreams into a single datastream at the main clock rate. The multiplexer is clocked in synchronism with the T-latch clocks in timed sequence to prevent the development of a transparent path between either T-latch input and the multiplexer output.
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Analog Devices Incorporated
Young Brian K.
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