Reduced soft output information packet selection

Pulse or digital communications – Systems using alternating or pulsating current – Plural channels for transmission of a single pulse train

Reexamination Certificate

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Reexamination Certificate

active

06529559

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to communication systems and more particularly relates to an apparatus for and a method of reducing the soft output information packet to be computed by a soft symbol generator that is subsequently used by a soft symbol to soft bit mapper.
BACKGROUND OF THE INVENTION
In recent years, the world has witnessed explosive growth in the demand for wireless communications and it is predicted that this demand will increase in the future. There are already over 500 million users that subscribe to cellular telephone services and the number is continually increasing. Eventually, in the not too distant future the number of cellular subscribers will exceed the number of fixed line telephone installations. Already, in many cases, the revenues from mobile services already exceeds that for fixed line services even though the amount of traffic generated through mobile phones is much less than in fixed networks.
Other related wireless technologies have experienced growth similar to that of cellular. For example, cordless telephony, two way radio trunking systems, paging (one way and two way), messaging, wireless local area networks (WLANs) and wireless local loops (WLLs). In addition, new broadband communication schemes are rapidly being deployed to provide users with increased bandwidth and faster access to the Internet. Broadband services such as xDSL, short range high speed wireless connections, high rate satellite downlink (and the uplink in some cases) are being offered to users in more and more locations.
In connection with cellular services, the majority of users currently subscribe to digital cellular networks. Almost all new cellular handsets sold to customers are based on digital technology, typically second generation digital technology. Currently, third generation digital networks are being designed and tested which will be able to support data packet networks and much higher data rates. The first generation analog systems comprise the well known protocols AMPS, TACS, etc. The digital systems comprise GSM, TDMA (IS-136) or CDMA (IS-95), for example.
A diagram illustrating an example prior art communication system employing an inner and outer encoder in the transmitter, inner and outer decoding stages in the receiver and a noise source after the channel is shown in FIG.
1
. The communication system, generally referenced
10
, represents the typical scheme that may be used in many of the communication services described above. In such a system, the transmitter
11
comprises an encoder
14
, interleaver
15
, symbol generator (i.e. bit to symbol mapper)
16
and modulator
18
. Input data bits
12
to be transmitted are input to the encoder
14
which may comprise an error correction encoder such as Reed Solomon, convolutional encoder, parity bit generator, etc. The encoder functions to add redundancy bits to enable errors in transmission to be located and fixed.
It is noted that both the inner and outer decoders in the receiver have complimentary encoders in the system. The outer encoder in the system comprises the encoder
14
, e.g., Reed Solomon, etc. The inner encoder comprises the channel
20
which often times can be modeled as an L-symbol long FIR-type channel.
The bits output from the encoder are then interleaved wherein the order of the bits are changed so as to more efficiently combat burst errors. The rearrangement of the bits caused by interleaving improves the resistance to error bursts while adding latency and delay to the transmission.
The bits output from the interleaver are then mapped to symbols by the bit to symbol mapper
16
. The bit to symbol mapper functions to transform the bits to modulator symbols. For example, an 8-PSK modulator uses 8 symbols Sk (k=0 . . . 7), hence the mapper takes three bits and converts them to one of eight symbols. Thus, the bit to symbol mapper generates a symbol for every three input bits.
The output from the mapper is input to the modulator
18
which receives symbols in the M-ary alphabet and generates the analog signal that is subsequently transmitted over the channel
20
. The channel may comprise a mobile wireless channel, e.g., cellular, cordless, a fixed wireless channel, e.g., satellite, or may comprise a wired channel, e.g., xDSL, ISDN, Ethernet, etc. The processing performed in the transmitter is intended to generate a signal that can be transmitted over the channel so as to provide robust, error free detection by the receiver.
At the receiver
13
, the analog signal from the channel is input to front end circuitry
22
which demodulates and samples the received signal to generate received samples y(k)
21
. The samples are then input to an inner decoder
24
. An example of an inner decoder is an equalizer which compensates for the ISI caused by the delay and time spreading of the channel in attempting to detect the symbols that were originally transmitted by the modulator.
Equalizers can be adapted to output hard symbol decisions or soft symbol decisions. Examples of types of commonly used hard decision equalizers include the maximum likelihood sequence estimation (MLSE) equalizer that utilize the well known Viterbi Algorithm (VA), linear equalizer and decision feedback equalizer (DFE). Examples of soft output type equalizers include Soft Output Viterbi Algorithm (SOVA) type equalizers and equalizers based on the more computational expensive Maximum A Posteriori (MAP) algorithm.
In the case of a hard decision equalizer, the output of the inner decoder comprises symbols s(k)
23
which represent hard decisions. If a soft output decoder is used, the symbols s(k) output of the inner decoder comprise soft symbol decisions. For a hard decision inner decoder, the output of the equalizer
24
along with the received samples
21
are input to a soft output generator
25
which functions to generate soft decision information
27
used by the de-interleaver. Note that depending on the type of de-interleaver, the soft output generator is adapted to generate either soft symbol information or soft bit information. In the former case, the de-interleaver must be adapted to perform symbol based de-interleaving. If the de-interleaver is adapted to perform bit based de-interleaving, the soft symbol information output from the soft output generator must first be converted to soft bit information. For example, an 8-PSK modulator uses 8 symbols Sk (k0 . . . 7), the mapper converts each symbol to three bits.
The output of the soft output generator is then input to a de-interleaver
26
which functions to restore the original order of either the symbols or the bits, depending on the type of de-interleaver used. The bits are then input to an outer decoder
29
which functions to locate and fix errors using the redundancy inserted by the encoder. The outer decoder generates the binary receive data a
k
28
.
Examples of the outer decoder include turbo decoders and convolutional decoders that utilize the Viterbi Algorithm. This class of decoders provides better performance by taking into account soft information about the reliability of the received symbol. The improved performance of the decoder cannot be realized, however, when soft information about the received symbols is not available. Note that the Viterbi algorithm is widely used in communication systems and has been adapted to perform functions including demodulation, decoding, equalization, etc. Many systems utilize the Viterbi Algorithm in both the inner and outer decoding stages.
As described above, the outer decoder, in some systems, is adapted to utilize the symbol decisions output from the inner decoder, e.g., the equalizer. Optimal decoders, however, require soft decisions rather than hard decisions. For example, an outer decoder that utilizes the Viterbi Algorithm to perform convolutional forward error correction decoding, requires soft decisions as input. The advantage of a Viterbi decoder is that it can efficiently process soft decision information. In order to provide soft symbol decisions, the inner decoder ty

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