Chemistry: electrical and wave energy – Apparatus – Coating – forming or etching by sputtering
Patent
1990-07-10
1992-05-05
Weisstuch, Aaron
Chemistry: electrical and wave energy
Apparatus
Coating, forming or etching by sputtering
156345, 156643, 20429835, 20419232, H05H 146, C23F 400
Patent
active
051104385
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Technical Background
The progress of LSI technology is extremely rapid, and the degree of integration is increasing year by year. Taking as an example dynamic random access memory (DRAM), memory capacity has quadrupled in three years. The product development for a 4-megabit DRAM has now been completed, and technical development is now directed to 16-megabit and 64-megabit DRAMs. With the increase in the degree of integration, the dimension of a unit element is minimized, and the minimum dimension is rapidly decreasing from 1 .mu.m to the order of submicron. Various devices and IC's are basically composed of a laminated structure of various types of thin film. For example, the main portion of a MOS transistor is composed of a 3-layer structure comprising electrode material, insulating thin film, and semiconductor substrate. The capacitor used for a memory cell of a DRAM has a 3-layer structure with a high dielectric thin film sandwiched by upper and lower electrode materials. A non-volatile memory element has a 5-layer structure composed of semiconductor substrate, insulating thin film, electrode material, insulating thin film, and electrode material. Thus, the thin film laminated structure dominates the most important characteristics of the device. Because the thickness of these thin films is increasingly becoming thinner with the miniaturization of the device, the characteristics of these thin films are the important factor to determine the characteristics, yield and reliability of the LSI. Therefore, the key point for the realization of ultra-high integration is the technique to form high quality thin films and to produce the laminated structure of thin films with high reliability. Further, this process requires low temperatures instead of the high temperatures of 900.degree.-1000.degree. C. as used at present. For example to produce a capacitor structure using aluminum as a lower electrode, the temperature utilized to form an insulating film and an electrode on it must be lower than the melting point of aluminum (about 630.degree. C.) for instance, 500.degree.-550.degree. C. or less--or more preferably, 400.degree. C. or less. For accurate control of N-type or P-type impurities, it is necessary to reduce the process temperature to 700.degree. C. or less.
In the following, description will be given of the method to produce a conventional type thin film laminated structure, taking as an example the manufacturing process of a DRAM memory cell.
FIG. 7 is a schematic drawing showing the cross sectional structure of a memory capacitor unit 701 of a DRAM memory cell as formed by the conventional technique. To produce this structure, field oxide film 703 is formed on silicon substrate 702, and the surface of silicon substrate 702 of memory capacitor forming portion 701 is exposed. Then, SiO.sub.2 film 704 of about 100 .ANG. is formed by thermal oxidation at 900.degree. C. (This SiO.sub.2 film acts as a capacitor insulating film.) Thereafter, polycrystal silicon thin film 705 is deposited by a CVD method, and the memory capacitor is produced by patterning it into the predetermined shape. In this process, after the surface of silicon substrate 702 is exposed by etching with dilute HF solution, the wafer is placed into a thermal oxidation furnace to grow the oxide film. After the wafer is taken out of the furnace, it is placed into a CVD apparatus and polycrystal silicon film 705 is deposited, and this is processed to form the predetermined pattern. As a result, the interface of each thin film comes into contact with atmospheric air because each thin film which composes the laminated structure is formed in a separate apparatus in the normal process. For this reason, the interfaces are contaminated by adsorption of contaminants in the atmospheric air, and this results in instability and variation of the isolation voltage or other characteristics of the thin film oxide film. An oxide film of 100 .ANG. thickness is the insulating film to be used for a 1-megabit DRAM. For a 4-megabit or
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Ohmi Tadahiro
Shibata Tadashi
Umeda Masaru
Ohmi Tadahiro
Weisstuch Aaron
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