Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2008-04-14
2009-10-06
Mai, Son L (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185130
Reexamination Certificate
active
07599227
ABSTRACT:
Methods for minimizing current consumption in a memory array during programming of non-volatile memory cells, such as NROM cells, in the array include: programming a cell without having a direct current flowing from a positive supply to ground through the array, programming a plurality of cells with programming pulses without discharging a global bit line carrying a programming voltage between programming pulses, and programming a cell with transient currents.
REFERENCES:
patent: 4818900 (1989-04-01), Klass et al.
patent: 5043941 (1991-08-01), Sakamoto
patent: 5686745 (1997-11-01), Lin et al.
patent: 5793679 (1998-08-01), Caser et al.
patent: 5844404 (1998-12-01), Caser et al.
patent: 6078521 (2000-06-01), Madurawe et al.
patent: 6172397 (2001-01-01), Oonakado et al.
patent: 6282145 (2001-08-01), Tran et al.
patent: 6574152 (2003-06-01), Lee et al.
patent: 6614692 (2003-09-01), Eliyahu et al.
patent: 6633496 (2003-10-01), Maayan et al.
patent: 6856551 (2005-02-01), Mokhlesi et al.
patent: 7366025 (2008-04-01), Maayan
patent: 2003/0058728 (2003-03-01), Tran et al.
patent: 2003/0145176 (2003-07-01), Dvir et al.
patent: 2005/0276118 (2005-12-01), Maayan
EMPK & Shiloh, LLP
Mai Son L
Saifun Semiconductors Ltd.
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