Reduced noise sensitivity, high performance FM demodulator...

Demodulators – Frequency shift keying or minimum shift keying demodulator

Reexamination Certificate

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Details

C329S304000, C329S318000, C375S324000, C375S334000

Reexamination Certificate

active

06304136

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates in general to an FM demodulator, and more particularly to an FM demodulator circuit and method that has a reduced sensitivity to noise which enhances the performance of a system.
2. Description of Related Art
Today's wireless communications markets are being driven by a multitude of user benefits. Products such as cellular phones, cordless phones, pagers, and the like have freed corporate and individual users from their desks and homes and are driving the demand for additional equipment and systems to increase their utility. As a result digital radio personal communications devices will play an increasingly important role in the overall communications infrastructure in the next decade.
Mixed-signal integration and power management have taken on added importance now that analog and mixed analog-digital ICs have become the fastest-growing segment of the semiconductor industry. Integration strategies for multimedia consoles, cellular telephones and battery-powered portables are being developed, as well as applications for less integrated but highly specialized building blocks that serve multiple markets. These building blocks include data converters, demodulators, filters, amplifiers and voltage regulators.
One important aspect of digital radio personal communications devices is the integration of the RF sections of transceivers. Compared to other types of integrated circuits, the level of integration in the RF sections of transceivers is still relatively low. Considerations of power dissipation, form factor, and cost dictate that the RF/IF portions of these devices evolve to higher levels of integration than is true at present. Nevertheless, there are some key barriers to realizing these higher levels of integration.
For example, most applications provide an FM demodulator in an RF receiver system to recover transmitted data from a carrier signal. For FM demodulators, robust performance requires a bit error rate (BER) performance close to the theoretical performance limit. However, this requires the implementation of circuitry which reduces the demodulator's sensitivity to noise.
It can be seen then that there is a need for an FM demodulator circuit method with reduced sensitivity to noise that provides a low bit error rate and performance.
SUMMARY OF THE INVENTION
To overcome the limitations in the prior art described above, and to overcome other limitations that will become apparent upon reading and understanding the present specification, the present invention discloses an FM demodulator circuit and method providing reduced sensitivity to noise which enhances the performance of a system almost identically with the theoretical predictions for an ideal demodulator.
The present invention solves the above-described problems by providing an FM demodulator circuit which reduces sensitivity to noise by reducing the bit error rate and enhancing the performance of the system.
A system in accordance with the principles of the present invention includes a discrete-time sampled detector for a binary frequency shift key (BFSK) modulated signal. The sampled waveform is provided by an in-phase (I) signal and a quadrature (Q) signal output of the receiver, which have been oversampled by a factor of four with respect to a data rate. The function of the demodulator is to sense a direction of rotation of an I/Q signal constellation in a Q vs. I plane and to generate an appropriate digital output.
Other embodiments of a system in accordance with the principles of the invention may include alternative or optional additional aspects. One such aspect of the present invention is that the system includes a time sampling detector which implements a discrete-time period rather than a continuous time period when sampling the modulated signal input. The discrete-time period makes it possible to use a plurality of circuitry, such as switched capacitor and analog circuits. Those skilled in the art will understand that the period is not limited to discrete-time, other measurements of time, such as continuous time, may be used.
Another aspect of the present invention is that the FM demodulator further includes an oversampling of the input signals to obtain robust performance in the presence of noise.
Another aspect of the present invention is that the FM demodulator further includes the elimination of a low amplitude signal to reduce the sensitivity to noise in the in-phase and the quadrature signals.
These and various other advantages and features of novelty which characterize the invention are pointed out with particularity in the claims annexed hereto and form a part hereof. However, for a better understanding of the invention, its advantages, and the objects obtained by its use, reference should be made to the drawings which form a further part hereof, and to accompanying descriptive matter, in which there are illustrated and described specific examples of an apparatus in accordance with the invention.


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