Reduced noise, low power, high speed output buffer

Details Reduced noise, low power, high speed output buffer Reduced noise, low power, high speed output buffer

1992-11-13

1994-07-12

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, 307473, 307263, H03K 19003, H03K 190948

Patent

active

053291751

ABSTRACT:
A reduced noise, low power, high speed output buffer circuit is provided for driving a load. The output buffer circuit utilizes multiple stage pull-up and pull-down transistors. During the time in which the first stage pull-down (or pull-up) transistor is activated, all of the opposing pull-up (or pull-down) transistors are deactivated at substantially the same time. Thereafter, the remaining stages of pull-down (or pull-up) transistors are activated. Delayed turn on in conjunction with rapid turn off achieves low overshoot and undershoot noise transient levels at the power supplies.

REFERENCES:
patent: 4638187 (1987-01-01), Boler et al.
patent: 4725747 (1988-02-01), Stein et al.
patent: 4959565 (1990-09-01), Knecht et al.
patent: 4961010 (1990-10-01), Davis
patent: 5025181 (1992-06-01), Farmer
patent: 5025182 (1992-06-01), Farmer
patent: 5036232 (1991-06-01), Jungert et al.
patent: 5103118 (1992-04-01), Peterson
patent: 5231311 (1993-07-01), Ferry et al.

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