Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate
1998-10-26
2001-05-08
Britton, Howard (Department: 2713)
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
C375S240140, C375S240240
Reexamination Certificate
active
06229852
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to decoding of digitally encoded video signals and, more particulary, to a video decoder and method for decoding compressed high-definition video data.
BACKGROUND OF THE INVENTION
Digital encoding and decoding of high-definition video signals provides higher image resolution and more effective control of the storage, manipulation and display of the video signal over existing analog NTSC and PAL video systems. In an HDTV broadcast environment, for example, digital video data is encoded at a transmission end in accordance with a specified compressed bitstream syntax, such as the MPEG-2 standard, and decoded at a receiving end in accordance with a specified decoding process. The decoded video signal is reconstructed at the receiving end into picture frames that may be presented for display in a sequence with an HDTV resolution of 1920×1080 for example, or down-converted to a standard NTSC resolution of 720×480.
Decoding of compressed video signals is a memory-intensive process, especially for compressed high-definition video signals. Receivers adapted to decode compressed high-definition video signals generally require a significant amount of memory to store reference frame data and additional side information required in the decoding process. In the past, for example, a typical HDTV receiver for decoding a high-definition MPEG-2 video bitstream has required 12 MB or more of random-access-memory (RAM) to provide adequate memory storage of control information and reference frame video data in the receiver for reconstructing the transmitted picture frames.
Due to the relatively high cost of high speed memory, developers of HDTV receivers have sought to reduce the amount of memory required in the receiver for the decoding process. In the past, one approach has been to exploit only a portion of the compressed data in the transmitted HDTV signal to produce a decoded video signal representing an image of lesser resolution. For example, HDTV receivers have been designed in the past that decimate the decoded video data in accordance with a predetermined decimation scheme either before or after the inverse discrete transform function of the decoder to reduce the amount of video data that is stored in memory for reconstruction of the picture frames.
Decoded DCT coefficients may be decimated by masking a block of DCT coefficients of an 8×8 DCT coefficient array before the remaining coefficients are applied to the IDCT circuit of the decoder. Alternatively, particular rows and columns of pixel data generated by the IDCT circuit in an 8×8 pixel data array may be eliminated to reduce the amount of video data that must be stored. The reconstructed picture frames are then displayed at a lower NTSC resolution.
While this approach requires less memory in the decoder for reconstructing picture frames, the decimation scheme performed by the decoder may result in reduced picture quality as a portion of the decoded video data is eliminated during the decoding process. Furthermore, since only a limited portion of the decoded video data can be eliminated without completely sacrificing picture quality, the decimation scheme achieves only a modest amount of compression and is not readily adaptable for memory-scalable applications where the amount of decoder memory may vary among different decoding applications.
Thus, there is a need for a video decoder and method for decoding compressed high-definition video data that provides high quality reconstructed picture frames with an improved compression ratio. There is also a need for a video decoder and method for decoding compressed high-definition video data that reduces the amount of memory required in the decoder for reconstructing high quality picture frames. There is yet also a need for a video decoder and method for decoding compressed high-definition video data that provides memory-scalability for different decoding applications.
SUMMARY OF THE INVENTION
The present invention overcomes the foregoing and other shortcomings and drawbacks of compressed video signal decoders and decoding methods heretofore known. While the invention will be described in connection with certain embodiments, it will be understood that the invention is not limited to these embodiments. On the contrary, the invention includes all alternatives, modifications and equivalents as may be included within the spirit and scope of the present invention.
In accordance with the principles of the present invention, a reduced-memory video decoder and decoding method are provided for decoding compressed high-definition video data. The video decoder includes compress and decompress circuits placed in the decoder's datapath to reduce the amount of reference frame video data that needs to be stored in frame buffer memory for reconstructing the transmitted frames.
The video decoder includes a macroblock (MB) parser and VLD circuit for parsing the incoming compressed video bitstream and decoding the block-level quantized DCT coefficients and motions vectors that are required in the frame or field reconstruction process. The decoded DCT coefficients are applied to an inverse quantization (IQ) and inverse Discrete Cosine Transform circuit to generate pel values (I-frames) or pel prediction errors (P- and B-frames) for each block of video data. The decoded motion vectors are applied to a motion compensator circuit.
In accordance with the principles of the present invention, reconstructed I- and P-reference frame video data is compressed by the compress circuit for storage in the frame buffer memory. Preferably, compress circuit is DCT based and variable length encodes the DCT coefficients as run-length and amplitude level pairs according to a Huffman variable length code similar to that used in the MPEG-2 standard. During the decoding of predictive P- and B-frames, corresponding reference frame video data is retrieved from frame buffer memory and applied to a decompress circuit. The decompress circuit is adapted to reconstruct I- and P-reference frames on-the-fly for use in motion compensated prediction. Various rate control schemes are provided to control the rate at which the compress circuit stores the variable length encoded data of reference I- and P-frames in frame buffer memory.
The above and other objects and advantages of the present invention shall be made apparent from the accompanying drawings and the description thereof.
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International Search Report, PCT/US99/23666, mailed Feb. 18, 2000.
Britton Howard
Sony Corporation
Wood Herron & Evans L.L.P.
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