Reduced memory architecture for edge modulator

Details Reduced memory architecture for edge modulator Reduced memory architecture for edge modulator

2007-09-11

2007-09-11

Payne, David C. (Department: 2611)

Pulse or digital communications

Systems using alternating or pulsating current

Angle modulation

C375S308000, C332S103000

Reexamination Certificate

active

10642822

ABSTRACT:
The present invention is a filtering apparatus in an 8 Phase Shift Keying (8PSK) system. The filtering apparatus comprises a π/16 phase shift module, a weight distribution module, and a combination module. The π/16 phase shift module is used for shifting a second vector from a 3π/8 phase shift module with π/16 radians to generate a corresponding third vector. The weight distribution module is used for distributing a plurality of selected weights to a predetermined distribution waveform and storing a plurality of corresponding weighted distribution waveforms. The combination module, according to the third vector, is used for determining which weight distribution waveforms to be selected from the weight distribution module and combining the selected weighted distribution waveforms to generate a modulation signal. The filtering apparatus and method of the present invention may save a lot of memory in the filtering process.

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