Reduced latency FIFO

Details Reduced latency FIFO Reduced latency FIFO

2011-05-24

2011-05-24

Ho, Duc C (Department: 2465)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S429000, C370S401000, C710S052000, C710S057000

Reexamination Certificate

active

07949002

ABSTRACT:
A First-In-First-Out (FIFO) block to buffer a packet having a size is presented. The FIFO block includes a receiver to receive a data frame including the packet and overhead information, and to extract the packet from the data frame. A buffer has a plurality of memory locations to store the packet in a FIFO configuration. A buffer manager, in response to detecting a buffer low packet condition, stalls reads of the packet from the buffer.

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