Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Encapsulating
Patent
1996-10-04
1998-06-02
Niebling, John
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Encapsulating
438124, H01L 2156
Patent
active
057598754
ABSTRACT:
A packaged LOC die assembly is disclosed including a die dielectrically adhered to the underside of a lead frame. Reduced-size filler particles are used in the encapsulant with the maximum allowable diameter of any particle depending upon the gap width between the lead frame and the die surface. Specifically, the maximum particle diameter is limited such that the ratio of maximum particle diameter to gap width is 0.95 or less, or preferably approximately 0.75. The reduced-size particles do not lodge between the leads and the active surface of the die during transfer molding of the encapsulant, thus, reducing point stresses on the active surface of the die by the filler particles.
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Micro)n Technology, Inc.
Niebling John
Turner Kevin F.
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