Reduced cost pixel design for flat panel x-ray imager

Radiant energy – Invisible radiant energy responsive electric signalling – Semiconductor system

Reexamination Certificate

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C257S401000

Reexamination Certificate

active

07897929

ABSTRACT:
A pixel structure for a flat panel detector is constructed in which the diode silicon and the FET silicon are simultaneously etched to form isolated structures (array photodiodes, I/O elements, and so on) in which the edges or perimeters of the diode silicon features are self-aligned to the underlying FET SI features. The full, as-deposited, thickness of the FET gate dielectric and (at least) part of the FET silicon layer remains underneath the diode silicon across the entirety of the flat panel detector.

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