Reduced complexity EPR4 post-processor for sampled data detectio

Details Reduced complexity EPR4 post-processor for sampled data detectio Reduced complexity EPR4 post-processor for sampled data detectio

1995-06-30

1996-05-28

Chin, Stephen

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

375263, 375290, 371 43, 360 65, H03D 100

Patent

active

055219454

ABSTRACT:
An EPR4 detector comprises a PR4 Viterbi detector and an EPR4 post-processor for improving estimated output sequence at an output of the PR4 Viterbi. The PR4 Viterbi detector produces digital estimates of coded digital information values into the channel in accordance with a path through a PR4 trellis and produces other path information relating to other paths through the PR4 trellis. The EPR4 post-processor has a PR4 path storage circuit for receiving and storing the estimated sequence of coded digital information values which corresponds to a PR4 path through a sequence of states of an EPR4 trellis; an error-event selection circuit for receiving the other path information from the PR4 Viterbi detector for generating non-overlapping error-events from a set of error-events deviating from the PR4 path through the EPR4 trellis stored in the PR4 path storage circuit, and a path correction circuit connected to the PR4 path storage circuit and to the error-event selection circuit for correcting non-overlapping error-events deviating from the PR4 path through the EPR4 trellis, and for putting out a corrected estimated sequence of coded digital information values. An EPR4 detection method is also disclosed.

REFERENCES:
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patent: 5408503 (1995-04-01), Kahlman
patent: 5430468 (1995-07-01), Minuhin et al.
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Knudson, Wolf and Milstein, "A Concatenated Decoding Scheme for (1-D) Partial Response With Matched Spectral-Null Coding", IEEE GlobeCom '93 Conf. Record, Globe Com, Houston, Texas, Nov. 29-Dec. 2, 1993, pp. 1960-1964.
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