Reduced complexity efficient binarization method and/or...

Details Reduced complexity efficient binarization method and/or... Reduced complexity efficient binarization method and/or...

2007-06-19

2007-06-19

Philippe, Gims (Department: 2621)

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

C341S107000

Reexamination Certificate

active

10639338

ABSTRACT:
An apparatus comprising a first processing circuit and a second processing circuit. The first processing circuit may be configured to generate a motion vector residual in response to one or more macroblocks of an input signal. The second processing circuit may be configured to convert between (i) the motion vector residual and (ii) a binarized representation of the motion vector residual. The binarized representation of the motion vector residual generally comprises (i) a binarized representation of an absolute value of the motion vector residual and (ii) a binarized representation of a sign of the motion vector residual when the motion vector residual has a non-zero value. The binarized representation of the sign is generally located after an end of the binarized representation of the absolute value of the motion vector residual.

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