Reduced architecture for multibranch feedforward power...

Details Reduced architecture for multibranch feedforward power... Reduced architecture for multibranch feedforward power...

2001-10-18

2004-01-27

Shingleton, Michael B (Department: 2817)

Amplifiers

With pilot frequency control means

C330S151000, C330S149000, C330S12400D

Reexamination Certificate

active

06683495

ABSTRACT:

FIELD OF THE INVENTION
This invention generally pertains to, but is not limited to, multibranch feedforward linearizers for amplifiers, for example, RF power amplifiers used in wireless communication systems.
BACKGROUND OF THE INVENTION
The operation of the multibranch feedforward linearizer shown in
FIG. 1
can be described in terms of two circuits: a signal cancellation circuit
101
and a distortion cancellation circuit
102
. When an adjuster circuit s
110
in the signal cancellation circuit
101
is set optimally, a linear estimate of the signal at the output of the power amplifier
103
is generated by the signal circuit cancellation paths and subtracted from the distorted power amplifier signal, v
pa
. The residual error signal from the signal cancellation circuit, v
e
, output from the subtractor
106
, is the power amplifier distortion signal. (As will be appreciated by those skilled in the art, the elements shown in
FIG. 1
as pickoff points and the elements shown as adders and subtractors may be implemented by directional couplers, splitters or combiners, as appropriate.)
The distortion cancellation circuit
102
subsequently adjusts the phase and amplitude of the distortion signal v
e
by adjuster circuit d
111
and error amplifier
108
to subtract it using subtractor
107
from the nonlinear output signal v
br
, output from the delay line
112
. This reduces the distortion in the final output signal (v
o
) from the linearized amplifier. The desired output takes the role of an “error signal” in the distortion cancellation circuit
102
. The level of distortion cancellation at the output of the linearized amplifier depends on how accurately adjuster circuits s
110
and d
111
are set, and how well those adjuster circuits track changes in the linearizer.
A notable variant of the multibranch feedforward linearizer is to place adjuster circuit s
109
in series with the power amplifier, as shown in
FIG. 3
, and to replace the adjuster circuit s
110
with a delay line
118
. In this configuration, any additional distortion generated by adjuster circuit s
109
is cancelled by the feedforward linearizer. The hardware or software used to set the parameters of the adjuster circuits
109
,
110
, and
111
are the subject of this invention.
The degree of distortion cancellation—its depth and bandwidth—at the output of the linearized amplifier depends on the structure of adjuster circuits s
110
(or
109
) and d
111
. A general implementation of the adjuster circuit s
110
for a multibranch feedforward linearizer includes M parallel circuit branches summed by combiner
206
as shown in FIG.
2
. Similarly, for adjuster circuit d
111
, N parallel circuit branches are summed by a combiner
216
(see FIG.
6
). In a single branch feedforward linearizer, the adjuster circuits s and d both have a single branch (M=1 and N=1, respectively), while at least one adjuster circuit in a multibranch linearizer has two or more branches, as shown in the examples of
FIGS. 2 and 6
. Each circuit branch of the adjuster circuit s shown in
FIG. 2
has a linear filter element (
200
,
202
,
204
) with a frequency response h
aj
(f) (j=1 to M) in series with a complex gain adjuster (CGA) (
201
,
203
and
205
). Similarly, each circuit branch of the adjuster circuit d shown in
FIG. 6
has a linear filter element (
210
,
212
,
214
) with a frequency response h
bj
(f) (j=1 to N) in series with a CGA (
211
,
213
and
215
). The linear filter elements h
aj
(f) and h
bj
(f) could be as simple as a delay or as complicated as a general linear filter function.
A multibranch feedforward linearizer has a significantly larger linearization bandwidth than a single branch feedforward linearizer, and the linearization bandwidth depends on the number of parallel branches in the adjuster circuits s
110
(or
109
) and d
111
. Single branch feedforward linearizers and multibranch feedforward linearizers are described in U.S. Pat. Nos. 5,489,875 and 6,208,207, both of which are incorporated by reference.
The CGAs in each branch of the adjuster circuit control the amplitude and phase of the signal in each branch. Two examples of CGA configurations are shown in
FIGS. 4 and 5
. The implementation shown in
FIG. 4
uses polar control parameters GA and GB, where GA sets the amplitude of the attenuator
401
, while GB sets the phase of the phase shifter
402
. The implementation shown in
FIG. 5
uses Cartesian control parameters, also designated GA and GB, where GA sets the real part of the complex gain, while GB sets the imaginary part of the complex gain. In this implementation, the input signal I is split into two signals by splitter
506
, one of which is then phase-shifted by 90 degrees by phase shifter
503
, while the other is not. After GA and GB are applied by mixers or attenuators
505
and
504
respectively, the signals are summed by combiner
507
to produce the CGA output signal O. U.S. Pat. No. 6,208,207 describes the use of linearization of these mixers and attenuators, so that desired values of complex gain can be obtained predictably by appropriate setting of the control voltages GA and GB.
A multibranch feedforward linearizer with M CGAs in the adjuster circuit s
110
of the signal cancellation circuit
101
and N CGAs in the adjuster circuit d
111
of the distortion cancellation circuit
102
is shown in FIG.
6
. In this linearizer, an adaptation controller
114
computes the parameters a
1
through a
M
of the CGAs of the adjuster circuit s
110
and the parameters b
1
through b
N
of the CGAs of the adjuster circuit d
111
, by monitoring internal signals of the adjusters s
110
and d
111
, and the error signal, v
e
, and the output signal, v
o
. The internal signals of the adjusters s
110
and d
111
are respectively v
a1
through v
aM
and v
b1
through v
bN
. The actual signals monitored by the adaptation controller are, however, v
am1
through v
amM
and v
bm1
through v
bmN
, wherein the difference between these internal signals and the monitored signals is respectively represented by observations filters h
am1
(f) through h
amM
(f) (
601
,
602
,
603
) and h
bm1
(f) through h
bmN
(f) (
605
,
606
,
607
). Further, the respective differences between the error and output signals, v
e
and v
o
, and the monitored error and output signals, v
em
and v
om
, can be represented by observation filters h
em
(f) (
604
) and h
om
(f) (
608
). The differences between the internal (or error and output) signals and the monitored signals are gain and phase changes therebetween caused by hardware implementation of the signal lines and monitoring components, e.g., cables, circuit board traces, mixers, filters and amplifiers. As represented by the observation filters, these gain and phase changes may be frequency dependent. Calibration methods for relating the internal, error and output signals to their monitored counterparts are discussed below.
The nonlinear power amplifier in the circuit is linearized by adjusting the M CGAs in the signal cancellation circuit and the N CGAs in the distortion cancellation circuit to optimal values via the adaptation controller. There are many different algorithms available for adjusting the CGAs in the feedforward circuit, but the complexity and rate of convergence vary significantly depending on what signals are monitored in the circuit. For example, an adaptation controller
714
, as shown in
FIG. 7
, monitors only the output error signals (v
e
and v
o
) for the signal and distortion cancellation circuits to generate control signals a and b. Known optimization algorithms, such as the Nelder-Mead (NM) simplex algorithm, the Davidon-Fletcher-Powell (DFP) algorithm, or those set forth in U.S. Pat. No. 5,489,875, operate to minimize the power in the associated error signal, but they are slow to converge. For example, in the DFP algorithm, the first derivatives of the signal cancellation circuit function are estimated with perturbations. Perturbations are deliberate misadjustment of the CGAs and used to estimate t

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