Electric power conversion systems – Current conversion – Using semiconductor-type converter
Reexamination Certificate
2000-10-16
2003-09-16
Berhane, Adolf D. (Department: 2838)
Electric power conversion systems
Current conversion
Using semiconductor-type converter
Reexamination Certificate
active
06621722
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the rectifying of alternating current (AC) into direct current (DC) by a normally “off” Junction Field Effect Transistor (JFET) that provides very low voltage drop across the source and drain for AC to DC power supplies or converters in low voltage application. The gate of this device is connected to the higher voltage terminal of three output terminals of the transformer. The gate turns-on the JFET when the gate is in forward bias above the threshold voltage of the normally “off” JFET. Since the threshold voltage of this normally “off” JFET can be set below 0.3 V and the forward bias of 0.5 V or less at the gate can sufficiently turn-on the device, a very low voltage drop to below 0.1 V across source and drain of the device can be realized at on state of this device. The current required to switch the device is only two to five times of orders of magnitude smaller than the current across the source and drain. Therefore very efficient rectifying for low voltage application is achieved.
2. Description of the Prior Art
As the technology moves toward deep submicron ranges, the required power supply voltage is decreased from 2.5 V for 0.25 micron technology to under 1.0 V for 0.13 micron or advanced technology. Normal P-N junction with a forward voltage drop of 0.8 V to over 1.0 V is no longer adequate for the power supplier with output voltage of 5.0 V or lower due to its high power consumption during forward current flow. The standard Schottky rectifier is also not adequate for the power supply voltage below 3.3 V. Special Schottky rectifier offers low forward voltage drop to about 0.3 V, however, this kind of Schottky rectifier is limited to 100 degree C maximum junction temperature and its high reverse leakage current becomes unattractive to many applications.
The concept of Junction Field Effect Transistors (JFET) has been proposed after the invention of bipolar transistors. Due to its majority carrier nature, the JFET can be operated at very high frequency. However, because of its physical properties, this kind of device is only available in the market for normally “on” JFET. This means that the normally “on” JFET is at “on” state when there is no bias applied to the gate. At the reverse bias higher than the threshold voltage Vt, the gate turns off the current flow between source and drain. Without readily available normally “off” JFETs, JFETs are not widely used as the MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors). In order to make the normally “off” FET, the distance between the gates must be small enough so that the depletion regions from both gates fill up the conduction channel. No current flows when the gate is at zero bias. This means that at forward bias above the threshold voltage of the gate, the depletion region is small enough, the conduction channel between source and drain is then open.
S. M. Sze has clearly described this concept in page 323, “Physics of Semiconductor Devices”, 2
nd
edition, John Wiley & Son, 1981. The symbols for n-type and p-type normally “on” and normally “off” JFET and MESFET are illustrated in FIG.
1
. However, in this book, the application of normally “off” FET is described for high speed and low power application. Since the original device structure has very long channel length that limits the current carrying capability and high on resistance.
From inventor's previous invention concepts, “Low On Resistance Transistors and the Method of Making” filed in Patent Office of Disclosed Document Program, Sep. 24, 1998, #444899, has disclosed the device structure for high current and low on resistance applications. This is a normally “on” JFET that offers high current and low on resistance for low voltage applications. Inventor's other concept, “Novel Structure of JFETs for Low Voltage Application”, filed in Patent Office of Disclosed Document Program, Sep. 17, 1998, #444874 disclosed the device structure of normally off JFETs for low voltage and high current applications. The provisional patent application, #60/115,009, has been filed on Jan. 6, 1999 and utility patent application #09/430,500, was filed on Oct. 29, 1999. The full disclosures of application #60/115,009 and application #09/430,500 are incorporated herein by reference.
SUMMARY OF THE PRESENT INVENTION
This invention uses a normally “off” Junction Field Effect Transistor (JET) to rectify AC current into DC current. With proper connection to the output terminals of the transformer, this device offers low forward voltage drop to below 0.1 V. Extremely low forward voltage, fast switching, low recovery time and low reverse leakage current of this type of device offer many advantages for low voltage applications. In order to control the gate effectively, the gate must be in forward bias condition respect to the source and drain. The distance between the gates, the doping concentration of the conduction channels and the gates, the thermal process cycles, the accuracy of lithography process and doping control determines the threshold voltage Vt. The threshold voltage is normally set between 0.2 V to over 0.3 V in order to operate the device up to 200-degree C. Therefore, the normal gate voltage in forward bias should be less than 0.7 V with voltage around 0.5 V preferred. This voltage (0.5 V) is sufficient enough to open the conduction channel between the gates in achieving of very low on resistance between source and drain. The key factor to operate this device effectively is to ensure the gate voltage in forward bias respect to source and drain. For normal P-N junction of silicon material, the current at forward bias of 0.5 V is 4 to 5 orders of magnitude less than at 0.8 V, therefore, this kind of normally “off” JFET offers extremely high current gain and low on resistance. Furthermore, since this is a majority carrier device, the device is much faster than the bipolar transistors.
This invention offers simple circuits connecting to the output side of the transformer by utilizing the normally “off” JFET for half wave or full wave rectifying. Similar approach can also apply to other complicated circuitry.
REFERENCES:
patent: 4419586 (1983-12-01), Phipps
patent: 4519024 (1985-05-01), Federico et al.
patent: 4853561 (1989-08-01), Gravrok
patent: 5038266 (1991-08-01), Callen et al.
patent: 6011703 (2000-01-01), Boylan et al.
patent: 6028778 (2000-02-01), Amano
patent: 6064580 (2000-05-01), Watanabe et al.
patent: 6069809 (2000-05-01), Inoshita
patent: 6084792 (2000-07-01), Chen et al.
patent: 6104172 (2000-08-01), Josephs et al.
patent: 6236257 (2001-05-01), Si et al.
patent: 6404157 (2002-06-01), Simon
patent: 6439678 (2002-08-01), Norton
Berhane Adolf D.
Lovoltech Inc.
Wagner , Murabito & Hao LLP
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