Recovery method of NAND flash memory device

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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Reexamination Certificate

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07864581

ABSTRACT:
A NAND flash memory device is recovered by applying a predetermined bias to a drain or a source. A negative bias is applied to a cell gate so that electrons are injected into a floating gate of a cell. This narrows the distribution of an erase threshold voltage and minimizes interference from states of peripheral cells.

REFERENCES:
patent: 5963475 (1999-10-01), Choi et al.
patent: 6434055 (2002-08-01), Tanaka et al.
patent: 2003/0112660 (2003-06-01), Lin et al.
patent: 10-1995-0000273 (1995-01-01), None
patent: 10-2000-0004214 (2000-01-01), None

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