Reconstructed semiconductor wafers including alignment...

Details Reconstructed semiconductor wafers including alignment... Reconstructed semiconductor wafers including alignment...

2007-03-13

2007-03-13

Brewster, William M. (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Bump leads

C257S774000, C257S790000

Reexamination Certificate

active

11196584

ABSTRACT:
Apparatus, systems and methods relating to the reconstruction of semiconductor wafers for wafer-level processing are disclosed. Selected semiconductor dice having alignment cavities formed in a surface thereof are placed in contact with liquid, gel or other flowable alignment droplets in a similar pattern protruding from a substrate to position the dice through surface tension interaction. The alignment droplets are then solidified to maintain the positioning and an underfill is disposed between the dice and the fixture to strengthen and maintain the reconstructed wafer. A fixture plate may be used in combination with the underfill to add additional strength and simplify handling. The reconstructed wafer may be subjected to wafer-level processing, wafer-level testing and burn-in being particularly facilitated using the reconstructed wafer. Alignment droplets composed of sacrificial material may be removed from the reconstructed wafer and the resulting void filled to form interconnects or contacts on the resulting dice.

REFERENCES:
patent: 4499655 (1985-02-01), Anthony
patent: 5634267 (1997-06-01), Farnworth et al.
patent: 5637536 (1997-06-01), Val
patent: 6013534 (2000-01-01), Mountain
patent: 6053395 (2000-04-01), Sasaki
patent: 6064221 (2000-05-01), Moden et al.
patent: 6219908 (2001-04-01), Farnworth et al.
patent: 6245595 (2001-06-01), Nguyen et al.
patent: 6258609 (2001-07-01), Farnworth et al.
patent: 6275051 (2001-08-01), Bachelder et al.
patent: 6444576 (2002-09-01), Kong
patent: 6610560 (2003-08-01), Pu et al.
patent: 2002/0066523 (2002-06-01), Sundstrom et al.
patent: 2003/0164555 (2003-09-01), Tong et al.

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