Reconfigurable texture cache

Details Reconfigurable texture cache Reconfigurable texture cache

1997-08-25

1999-12-14

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Integrated circuit

345430, 345508, 711129, 711170, 711 5, G09G 500

Patent

active

060024100

ABSTRACT:
A reconfigurable cache in a signal processor provides a cache optimized for texture mapping. In particular, the reconfigurable cache provides two-banks of memory during one mode of operation and a palettized map under a second mode of operation. In one implementation, the reconfigurable cache optimizes mip-mapping by assigning one texture map in one of the memory banks and a second texture map of a different resolution to the other memory bank. A special mapping pattern ("supertiling") between a graphical image to cache lines minimizes cache misses in texture mapping operations.

REFERENCES:
patent: 5410669 (1995-04-01), Biggs et al.
patent: 5598526 (1997-01-01), Daniel et al.
patent: 5914725 (1999-06-01), MacInnis et al.

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