Electrical computers and digital processing systems: processing – Architecture based instruction processing
Reexamination Certificate
2006-10-31
2006-10-31
Coleman, Eric (Department: 2183)
Electrical computers and digital processing systems: processing
Architecture based instruction processing
Reexamination Certificate
active
07130987
ABSTRACT:
Data processors and methods for their configuration and use are disclosed. As opposed to traditional von Neumann microprocessors, the disclosed processors are semantic processors—they parse an input stream and direct one or more semantic execution engines to execute code segments, depending on what is being parsed. For defined-structure input streams such as packet data streams, these semantic processors can be both economical and fast as compared to a von Neumann system. Several optional components can augment device operation. For instance, a machine context data interface relieves the semantic execution engines from managing physical memory, allows the orderly access to memory by multiple engines, and implements common access operations. Further, a simple von Neumann exception-processing unit can be attached to a semantic execution engine to execute more complicated, but infrequent or non-time-critical operations.
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Coleman Eric
Marger & Johnson & McCollom, P.C.
Mistletoe Technologies, Inc.
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