Reconfigurable mixer-filter-decimator

Telecommunications – Receiver or analog modulated signal frequency converter – Convertible to different type

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4551881, 455214, 455266, 455307, 455324, 455334, 375328, 375350, 329317, H04B 116

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057323372

ABSTRACT:
A digital mixer-filter-decimator (MFD) is disclosed which is reconfigurable so that it can be used in both modes of operation of a dual mode receiver such as an AM/FM receiver. In either mode of operation the MPD performs filtering and decimation operations on separate data streams containing alternate samples of a digital input data stream. In the FM mode a mixing operation is also enabled to produce a complex output comprising in-phase and quadrature components. The mixing operation is disabled in the AM mode and the filtered and decimated outputs are combined to provide a real output. The same decimator filter can be used in both modes.

REFERENCES:
patent: 4406019 (1983-09-01), Ide et al.
patent: 4592074 (1986-05-01), Whikehart
patent: 4737728 (1988-04-01), Nakamura et al.
patent: 4853944 (1989-08-01), Lo et al.
patent: 4881191 (1989-11-01), Morton
patent: 5220583 (1993-06-01), Solomon
patent: 5222144 (1993-06-01), Whikehart
patent: 5487023 (1996-01-01), Seckova
patent: 5557642 (1996-09-01), Williams
patent: 5614862 (1997-03-01), Sun
"An Evaluation of Several Two-Summand Binary Adders", by J. Sklansky, IRE Trans. on Electronic Computers, Jun., 1960, pp. 213-231.
"A New Type of Digital Filter for Data Transmission", by Van Gerwen et al., IEEE Transactions on Communications, vol. Com-23, No. 2, Feb., 1975, pp. 222-234.
"A Digital Filter Structure Requiring Only m-Bit Delays, Shifters, Inverters, and m-Bit Adders Plus Simple Logic Circuitry", by P. R. Moon et al., IEEE Transactions on Circuits and Systems, vol. CAS-27, No. 10, Oct., 1980, pp. 901-908.
"Interpolation and Decimation of Digital Signals--A Tutorial Review", by Crochiere et al., Proceedings of the IEEE, vol. 69, No. 3, Mar., 1981, pp. 300-331.
"An Economical Class of Digital Filters for Decimation and Interpolation", Eugene B. Hogenbauer, IEEE Transactions on Acoustics, Speech, and Signal Processing, vol. ASSP-29, No. 2, Apr., 1981, pp. 155-162.
"Multirate Filter Designs Using Comb Filters", by Shuni Chu et al., IEEE Transactions on Circuits and Systems, vol. CAS-31, No. 11, Nov., 1984, pp. 913-924.
"Efficient and Multiplierless Design of FIR Filters with Very Sharp Cutoff via Maximally Flat Building Blocks", by P.P. Vaidyanathan, IEEE Transactions on Circuits and Systems, vol. CAS-32, No. 3, Mar., 1985, pp. 236-224.
"Multiplierless FIR Filter Structures Based On Running Sums and Cyclotomic Polynomials", by H. Babic et al., Signal Processing III: Theories and Applications, Elsevier Science Publishers B.V. (North Holland), EURASIP, 1986, pp. c2.9, 160-162, 1044-1047.
"Decimation For Bandpass Sigma-Delta Analog-To-Digital Conversion", by Schreier et al, IEEE Technical Article #CH2868-8, 1990, pp. 1801-1804.

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