Patent
1996-12-19
2000-02-29
Teska, Kevin J.
39550014, G06F 1520
Patent
active
06031981&
ABSTRACT:
A method and system to efficiently incorporate engineering change order (ECO) modifications into an integrated circuit layout having configurable gate array cells is provided. In generating the original integrated circuit layout, extra gate array cells are inserted into the layout. These gate array cells can be reconfigured to modify their functionality according to changes specified by the ECO. A new netlist with a description of the required modifications is generated and provided to a place-and-route CAD tool to create a new layout of the integrated circuit.
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Cell3 Ensamble.TM. Ref. Manual; Version 4.5; Dec. 1995; CADENCE.
Chen Tsung-Yen
Lee Kuochun
Wang Fong Jim
Cirrus Logic Inc.
Do Thuan
Teska Kevin J.
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