Reconfigurable dual processor system

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

364187, 371 9, G06F 1120

Patent

active

048232564

ABSTRACT:
A is a duel processor system (100) with duplicated memory (114,124) has two modes (10,11) of operation: a converged mode (10) in which one of the two processors (101,102) is active and executing all system tasks while the other processor is inactive; and a diverged mode (11) in which both processors are active and independently executing different tasks. The system automatically changes modes in response to requests such as manual and program control and certain system fault conditions. In diverged mode, the system may be in either of two states of operation (1 and 2). In one state (1) one processor (101) is designated a primary processor, and in the other state (2) the other processor (102) is designated the primary processor. In the converged mode the system may be in either of four states of operaton (3-6). In two of these states (3,4) one processor is active while the other processor is standing by ready to take up execution of tasks from the point where the one processor stoped execution. In the other two of these states (5,6) one processor is active while the other processor is out of service and cannot take up task execution without being initialized. The system 100 makes transitions between the various states in response to requests. Except for transitions of an active processor to an out-of-service condition, the state transitions are transparent to tasks other than fault recovery programs and, upon a fault condition, the faulted program.

REFERENCES:
patent: 3303474 (1967-02-01), Moore et al.
patent: 3557315 (1971-01-01), Kobus et al.
patent: 3636331 (1972-01-01), Amrehn
patent: 3810121 (1974-05-01), Chang et al.
patent: 3812469 (1974-05-01), Hauck et al.
patent: 3820085 (1974-06-01), Zelinski
patent: 3828321 (1974-08-01), Wilber et al.
patent: 3864670 (1975-02-01), Inoue et al.
patent: 3865999 (1975-02-01), Spitaels
patent: 3889237 (1975-06-01), Alferness et al.
patent: 3959638 (1976-05-01), Blum et al.
patent: 3991407 (1976-11-01), Jordan, Jr. et al.
patent: 4073005 (1978-02-01), Parkin
patent: 4099235 (1978-07-01), Hoschler et al.
patent: 4099241 (1978-07-01), Ossfeldt
patent: 4152764 (1979-05-01), Connors et al.
patent: 4208715 (1980-06-01), Kumahara et al.
patent: 4228503 (1980-10-01), Waite et al.
patent: 4257009 (1981-03-01), Appelt
patent: 4270167 (1981-03-01), Koehler et al.
patent: 4282572 (1981-08-01), Moore, III et al.
patent: 4318173 (1982-03-01), Freedman et al.
patent: 4358823 (1982-11-01), McDonald et al.
patent: 4371754 (1983-02-01), De et al.
patent: 4403286 (1983-09-01), Fry et al.
patent: 4428044 (1984-01-01), Liron
patent: 4455601 (1984-06-01), Griscom et al.
patent: 4530051 (1985-07-01), Johnson et al.
patent: 4590554 (1986-05-01), Glazer et al.
patent: 4628508 (1986-12-01), Sager et al.
"Proceeding of the IEEE", vol. 66, No. 10, Oct. 1978, entire issue.
"The Bell System Technical Journal", vol. 62, No. 1, Part 2, Jan. 1983, entire issue.
Fick et al., "System Configurations Determine Degree of Fault Tolerance", Computer Technology Review, vol. 3, No. 1, Jan. 1883, pp. 33-35, 36-37.
S. Ohr, "Fault-Tolerant System Stops Multiple CPUs from Wasting Their Time", Electronic Design, (Jul. 21, 1983), pp. 41-42.
DEC Brochure on the VAX 11/782.
Tze-Shiu Liu, "Maintenance Processors for Mainframe Computers", IEEE Spectrum, (Feb. 1984), pp. 36-42.
T. F. Storey, "Design of a Microprogram Control for a Processor in an Electronic Switching System", The Bell System Technical Journal, vol. 55, No. 2, (Feb. 1976), pp. 183-232.
L. E. Gallaher et al., "The Fault-Tolerant 3B20 Processor", AFIPS Conference Proceedings, 1981 National Computer Conference, (5/4-7/81, Chicago, IL), pp. 41-48.
E. I. Orlov "Joint Operation of Two Electronic Computers Solving a Common Problem", Soviet Journal of Instrumentation and Control, No. 2, (Feb. 1968), pp. 38-39.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Reconfigurable dual processor system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Reconfigurable dual processor system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reconfigurable dual processor system will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2400048

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.