Reconfigurable CPU with second FSM control unit executing...

Electrical computers and digital processing systems: processing – Instruction decoding

Reexamination Certificate

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C712S211000, C712S248000

Reexamination Certificate

active

10682378

ABSTRACT:
A reconfigurable control structure for CPUs comprises a first control unit with a first basic instruction set associated therewith, and a second control unit, with a second instruction set associated therewith. Associated with the second control unit is at least one programming element for rendering the second instruction set selectively modifiable. Also present is at least one circuit element for supplying instruction codes to be executed to the first control unit and to the second control unit, so that each instruction can be executed under the control of at least one between the first control unit or the second control unit according to whether the instruction is comprised in the first basic instruction set and/or in the second selectively modifiable instruction set.

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