Reconfigurable bus

Details Reconfigurable bus Reconfigurable bus

1987-09-04

1990-06-12

James, Andrew J.

Boots, shoes, and leggings

H04Q 900

Patent

active

049338455

ABSTRACT:
In a system having a first computer with a first processor, a reconfigurable bus for coupling the first processor to a first type of device in one configuration and to a second type of device in another configuration is accomplished using a bus coupled to the first processor and having at least a plurality of data and address lines and plurality of configuration lines, a device for detecting the assertion of a bit on one of the configuration lines, assertion indicating that a first type of device requiring an I/O bus is attached and nonassertion that a memory is attached and registers coupled to configuration lines to receive and store binary information on bus for one configuration and to receive an input on at least one of the lines and provide an output at least another of the lines in the other configuration.

REFERENCES:
patent: 4370708 (1983-01-01), Bruce et al.
patent: 4480307 (1984-10-01), Budde et al.
patent: 4519034 (1985-05-01), Smith et al.
patent: 4564900 (1986-01-01), Smitt
patent: 4633039 (1986-12-01), Holden
patent: 4635192 (1987-01-01), Ceccon et al.
patent: 4661905 (1987-04-01), Bomba et al.
patent: 4706190 (1987-11-01), Bomba et al.
patent: 4734909 (1988-03-01), Bennett et al.
patent: 4750150 (1988-06-01), Weppler

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