Reconfigurable array processor for floating-point operations

Electrical computers and digital processing systems: processing – Processing architecture – Array processor

Reexamination Certificate

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C712S010000, C712S229000

Reexamination Certificate

active

08078835

ABSTRACT:
A processor for performing floating-point operations includes an array of processing elements arranged to enable a floating-point operation. Each processing element includes an arithmetic logic unit to receive two input values and perform integer arithmetic on the received input values. The processing elements in the array are connected together in groups of two or more processing elements to enable floating-point operation.

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Shamsiah Suhaili et al., “Design and Implementation of Reconfigurable ALU on FPGA,”3rdInternational Conference on Electrical&Computer Engineering, ICECE 2004, Dec. 28-30, 2004, Dhaka, Bangladesh, pp. 56-59.
Dominique Lavenier et al., “Integer / Floating-point Reconfigurable ALU,”Technical Report LA-UR #99-5535, Los Alamos National Laboratory, Computer Research and Application, Los Alamos, NM, Nov. 1999, pp. 1-20.

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