Recirculating transparent latch employing a multiplexing circuit

Details Recirculating transparent latch employing a multiplexing circuit Recirculating transparent latch employing a multiplexing circuit

1991-10-10

1992-09-15

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072721, 307571, 307242, 307582, 307585, H03K 326, H03K 11687

Patent

active

051480522

ABSTRACT:
A data latching circuit includes a standard clock qualified transparent latch cell which receives an input data signal and an enable signal. The input data signal is also asserted at the input of a first transistor gate circuit which is controlled by the enable signal. The output of the transparent latch is asserted at the input of a second transistor gate circuit which is controlled by an inverted enable signal. The outputs of the two transistor gate circuits, only one of which is active at any time, are combined and buffered for output.

REFERENCES:
patent: 4819208 (1989-04-01), Nakabayashi et al.
patent: 4940904 (1990-07-01), Lin
patent: 4970407 (1990-11-01), Patchen
patent: 5001368 (1991-03-01), Cliff et al.
patent: 5036221 (1991-07-01), Brucculeri et al.

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