Recessed shallow trench isolation structure nitride liner and me

Details Recessed shallow trench isolation structure nitride liner and me Recessed shallow trench isolation structure nitride liner and me

1998-10-30

1999-08-17

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438424, 438437, 148DIG50, H01L 2176

Patent

active

059407174

ABSTRACT:
A method for reducing hot carrier reliability problems within an integrated circuit device. The method includes forming a shallow trench isolation structure incorporated with the device by filling a trench with a photoresist plug and removing a portion of the photoresist plug to a level below the depth of a channel also incorporated with the device. A nitride liner disposed within the trench under the photoresist plug is then recessed to a level substantially equal to the level of the photoresist material, which is then removed. The method further includes the deposition of oxide fill within the trench, thereby encapsulating the recessed nitride liner.

REFERENCES:
patent: 4847214 (1989-07-01), Robb et al.
patent: 5096849 (1992-03-01), Beilstein, Jr. et al.
patent: 5447884 (1995-09-01), Fahey et al.
patent: 5618751 (1997-04-01), Golden et al.

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