Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2000-06-28
2003-06-10
Elms, Richard (Department: 2824)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S070000, C438S412000, C438S459000, C438S669000, C174S050510
Reexamination Certificate
active
06576494
ABSTRACT:
TECHNICAL FIELD
This invention relates to recessed encapsulated microelectronic devices, and methods for forming such encapsulated devices.
BACKGROUND OF THE INVENTION
Packaged microelectronic assemblies, such as memory chips and microprocessor chips, typically include a microelectronic device mounted to a substrate and encased in a plastic protective covering. The device includes functional features, such as memory cells, processor circuits and interconnecting circuitry. The device also typically includes bond pads electrically coupled to the functional features. The bond pads are coupled to pins or other types of terminals that extend outside the protective covering for connecting the microelectronic device to buses, circuits and/or or other microelectronic assemblies.
In one conventional arrangement, shown in
FIG. 1
, a packaged device
50
includes a substrate
10
(such as a printed circuit board or “PCB”) having an upper surface
11
and a lower surface
12
. The substrate
10
includes conductive substrate pads
14
on the upper surface
11
connected to ball pads
15
on the lower surface
12
by a plurality of vias
16
. A microelectronic die
30
having die bond pads
31
is positioned on the upper surface
11
, and the die bond pads
31
are connected with to the substrate pads
14
by wire bonds
32
. The microelectronic die
30
is then encapsulated with an encapsulating material
40
to protect the die
30
and the wire bonds
32
. Solder balls can then be connected to the ball pads
15
for linking the die
30
to a circuit or another device.
In another conventional arrangement, shown in
FIG. 2
, a package
50
a
can include a lead frame
25
having lead fingers
27
positioned adjacent to the die
30
. In one aspect of this arrangement, the lead frame
25
can include a paddle (not shown) that extends between the lead fingers
27
to support the die
30
. Alternatively, the paddle can be replaced with a layer of thermoset adhesive material
17
that extends between the lead fingers
27
and supports the die
30
. The thermoset material
17
is then heated to bond the material to the die
30
, and the bond pads
31
on the die
30
are wire bonded to the lead fingers
27
. An encapsulating material
40
a
is disposed over both the die
30
and the thermoset material
17
to form the package
50
a,
and the ends of the lead fingers
27
are bent to form pins
26
for connecting the die
30
to other devices or circuits.
The packages
50
and
50
a
described above with reference to
FIGS. 1 and 2
can suffer from several drawbacks. For example, the overall height H of the packages
50
and
50
a
may be so large that it is difficult to integrate the packages with low-profile electronic products, such as mobile telephones and hand-held or laptop computers. Furthermore, it may be difficult to transfer heat from the dies
30
because the dies
30
are surrounded on all sides by materials having low thermal conductivities. For example, the die
30
shown in
FIG. 1
is surrounded by the encapsulating material
40
and the substrate
10
, and the die
30
shown in
FIG. 2
is surrounded by the encapsulating material
40
a
and the thermoset material
17
. It is particularly important to dissipate heat in high-speed microprocessors and memory devices to maintain the performance levels of these devices. Thus, the package
50
and
50
a
may not be adequate for use in many types of products.
SUMMARY
The present invention is directed toward microelectronic device packages and methods for forming such packages. A method in accordance with one aspect of the invention includes positioning a microelectronic device at least partially within a cavity of a support member having a first surface and a second surface facing opposite the first surface, with the cavity extending through the support member from the first surface to the second surface. The method can further include supporting the microelectronic device relative to the cavity with a removable retention member. The microelectronic device is electrically coupled to the support member and a portion of the microelectronic device is encased with an encapsulating material. The removable retention member is then removed from the support member.
In a further aspect of the invention, the microelectronic device has a first face and a second face facing opposite the first face. The second face of the microelectronic is initially engaged with the removable retention member and is exposed when the removable retention member is removed. In still a further aspect of the invention, a heat transfer material can be applied to the second face of the microelectronic device to conduct heat away from the microelectronic device.
The invention is also directed toward a microelectronic device package. In one aspect of the invention, the package can include a support member having a first surface, a second surface facing opposite the first surface, and a cavity extending through the support member from the first surface to the second surface. The support member defines a first region extending outwardly from the first surface and a second region extending outwardly from the second surface. A microelectronic device having a first face and a second face facing opposite the first face is disposed in the cavity. The package further includes an encapsulating material positioned in the first region defined by the support member, but not in the second region, such that the encapsulating material at least partially surrounds the microelectronic device adjacent to the first face of the microelectronic device.
REFERENCES:
patent: 4012579 (1977-03-01), Fox et al.
patent: 4862245 (1989-08-01), Pashby et al.
patent: 5140404 (1992-08-01), Fogal et al.
patent: 5252853 (1993-10-01), Michii
patent: 5304842 (1994-04-01), Farnworth et al.
patent: 5471369 (1995-11-01), Honda et al.
patent: 5475918 (1995-12-01), Kubota et al.
patent: 5536969 (1996-07-01), Matsuoka
patent: 5583371 (1996-12-01), Hori
patent: 5593927 (1997-01-01), Farnworth et al.
patent: 5663593 (1997-09-01), Mostafazadeh et al.
patent: 5665651 (1997-09-01), Asada et al.
patent: 5677566 (1997-10-01), King et al.
patent: 5696033 (1997-12-01), Kinsman
patent: 5715593 (1998-02-01), Kimura
patent: 5729049 (1998-03-01), Corisis et al.
patent: 5739585 (1998-04-01), Akram et al.
patent: D394844 (1998-06-01), Farnworth et al.
patent: D402638 (1998-12-01), Farnworth et al.
patent: 5847455 (1998-12-01), Manteghi
patent: 5851845 (1998-12-01), Wood et al.
patent: 5862245 (1999-01-01), Pashby et al.
patent: 5866939 (1999-02-01), Shin et al.
patent: 5891753 (1999-04-01), Akram
patent: 5893726 (1999-04-01), Farnworth et al.
patent: 5898224 (1999-04-01), Akram
patent: 5933713 (1999-08-01), Farnworth
patent: 5938956 (1999-08-01), Hembree et al.
patent: 5956236 (1999-09-01), Corisis et al.
patent: 5958100 (1999-09-01), Farnworth et al.
patent: 5973396 (1999-10-01), Farnworth
patent: 5986209 (1999-11-01), Tandy
patent: 5989941 (1999-11-01), Wensel
patent: 5990566 (1999-11-01), Farnworth et al.
patent: 5994784 (1999-11-01), Ahmad
patent: RE36469 (1999-12-01), Wood et al.
patent: 6008070 (1999-12-01), Farnworth
patent: 6020629 (2000-02-01), Farnworth et al.
patent: 6025728 (2000-02-01), Hembree et al.
patent: 6028356 (2000-02-01), Kimura
patent: 6028365 (2000-02-01), Akram et al.
patent: 6046496 (2000-04-01), Corisis et al.
patent: 6048744 (2000-04-01), Corisis et al.
patent: 6048755 (2000-04-01), Jiang et al.
patent: 6049125 (2000-04-01), Brooks et al.
patent: 6072236 (2000-06-01), Akram et al.
patent: 6075288 (2000-06-01), Akram
patent: 6097087 (2000-08-01), Farnworth et al.
patent: 6103547 (2000-08-01), Corisis et al.
patent: 6107122 (2000-08-01), Wood et al.
patent: 6107680 (2000-08-01), Hodges
patent: 6117382 (2000-09-01), Thummel
patent: 6117710 (2000-09-01), Mostafazadeh et al.
patent: 6124634 (2000-09-01), Akram et al.
patent: 6137162 (2000-10-01), Park et al.
patent: 6150717 (2000-11-01), Wood et al.
patent: 6159764 (2000-12-01), Kinsman et al.
patent: 6172419 (2001-01-01), Kinsman
patent: 6184465 (2001-02-
Elms Richard
Luu Pho M.
Micro)n Technology, Inc.
Perkins Coie LLP
LandOfFree
Recessed encapsulated microelectronic devices and methods... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Recessed encapsulated microelectronic devices and methods..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Recessed encapsulated microelectronic devices and methods... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3155937