Reception synchronization circuit, receiver using the same,...

Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels

Reexamination Certificate

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C370S326000, C370S486000, C370S535000, C375S342000, C375S365000, C375S368000

Reexamination Certificate

active

06493360

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a reception synchronization circuit, a reception synchronization method and a receiver, and particularly to a reception synchronization circuit, a reception synchronization method, a receiver and a digital communication system for receiving a synchronous word or a unique word (hereinafter referred to as “UW”) which is used to establish synchronization and transmitted in a predetermined digital a pattern for transmission of digital data in a satellite communication and a mobile communication, for example, ICO system (Inmarsat-P Communication system), Iridium system, Global Star system, CDMAOne system, GSM (Global System for Mobile Communication) and W-CDMA system.
2. Description of the Related Art
Japanese Laid-open Patent Application No. Hei-1-256232 (prior art 1) discloses a synchronous word (UW) detection system. The synchronous word detection system comprises a line quality monitoring circuit for monitoring the quality of a line at any time with a controller of a TDMA (Time Division Multiple Access) satellite communication system and outputting line quality information at a predetermined time interval; a permission error number setting circuit which receives the line quality information and search
arrow mode information representing a reception synchronization process in the TDMA satellite communication system to make the permission error number (threshold value &egr;) of a synchronous word pattern of the satellite circuit variable in accordance with the quality of the line at a predetermined time interval and output it; a threshold value correlation detection circuit which receives the variable permission error from the permissible error number setting circuit, compares reception input data with a predetermined synchronous word pattern to establishment a correlation therebetween, and then outputting a coincidence pulse on the basis of an indicated permission error number &egr;; a storage circuit containing hardware information to exchange the permission error number setting circuit and the threshold value correlation detection circuit with each other on a real-time basis with the search
arrow information and the line quality information as an input address; and a logic circuit for performing AND between the coincidence pulse output from the threshold value correlation detection circuit and an aperture signal occurring at a normal position of a reception reference burst and outputting a synchronization detection pulse.
With the synchronous word system thus constructed, the UW detection can be efficiently performed on a real-time basis, and particularly it can perform the detection of UW efficiently when applied to an earth station having a compact-size antenna (1 to 2 m level) or an earth station in which deterioration of C/N due to attenuation of a rainfall remarkably appears.
Japanese Laid-open Patent Application No. Hei-3-46429 (prior art 2) discloses a unique word detection circuit apparatus including a code error rate measuring circuit for measuring the code error rate of reception data input and outputting the code error rate thus measured; a correlation detection threshold value calculation circuit for calculating and outputting the correlation detection threshold value (&egr;) corresponding to the code error rate; a microprocessor for outputting the correlation detection threshold value (&egr;) with a bus signal; and a unique word detection circuit for judging detection or miss detection of the correlation detection threshold value (&egr;) output from the microprocessor and the reception unique word and then outputting a unique word detection signal only when the unique word is detected.
With the unique word detection circuit apparatus thus constructed, loss of a unique word due to temporary deterioration of a code error rate , loss of reception data which is appendant to the loss of the unique word, and out-of-synchronization of a line can be prevented, thereby enhancing synchronization precision and reliability.
Japanese Laid-open Patent Application No. Hei-3-70226 (prior art 3) discloses maximum value detection selection means for selecting the reception signal having the maximum envelope level from reception signals which are received by plural antennas; a limiter circuit for dividing the reception signal having the maximum enveloped level thus selected by the maximum envelope level to normalize the reception signal having the maximum envelope level and set the envelope level to a predetermined value; means for calculating a complex correlation coefficient between the normalized reception signal and the complex signal corresponding to a specific frame synchronization pattern (UW); and comparison means for comparing the complex correlation coefficient with any threshold value level, wherein a frame synchronization detection circuit judges the reception signal as a frame synchronization pattern (UW) when the complex correlation coefficient is larger than the threshold value level.
Accordingly, in a reception apparatus using a diversity reception system, the effect of multi-path fading can be removed, and the detection precision of the frame synchronization pattern can be enhanced, so that there can be achieved a digital ground mobile radio (wireless) communication system having high reception precision.
Further, Japanese Laid-open Patent Application No. Hei-5-167630 (prior art 4) discloses a unique word detector including: a first delay detector for receiving as an input signal a signal obtained by subjecting quasi-synchronization and demodulation to a reception signal in which a unique word is inserted, and detecting the delay of the input signal; a unique word generator for generating a complex conjugate value of the unique word; a second delay detector for detecting the delay of the output of the unique word generator; a mutual correlator for taking a mutual correlation between the first and second delay detectors; and a level detector for comparing the output of the mutual correlator with a predetermined threshold value to detect the maximum value thereof.
With the unique word detector thus constructed, the input signal is subjected to the delay detection by the first delay detector to remove a frequency offset therefrom, and then input to the mutual correlator while a frequency offset is removed therefrom. Therefore, even when an input signal has large frequency instability, it is unnecessary to arrange many mutual correlators in parallel for use unlike the prior art, and thus the circuit scale can be greatly reduced. In addition, only one input signal is supplied to the level detector, so that the error detection probability can be reduced.
However, in the prior arts 1 to 4, the detection means of UW itself is shown, and it is applicable to a case where a received status is surely stable. However, when the received status is unstable, an error detection state occurs in UW itself, and thus UW detection which takes no consideration into the received status is little accurately performed. Further, a predetermined time is needed to detect the correlation of UW, and when the correlation of UW is taken although the received status is bad, time is merely wasted.
In the prior art 4, the level detection is performed by the quasi-synchronized and modulated signal of the reception signal and the unique word generator for generating the complex conjugate of UW. In this prior art, the level detection is accurate, however, the relationship between the level detection and the detection of UW is not clarified.
That is, when a reception frequency at which a reception signal exists is not known at an initial stage, the reception electric field intensity of the reception signal, that is, the reception power is first detected in order to establish an early synchronization between the reception frequency and the clock timing. At this time, in the case where the detection level of the reception power is judged on the basis of only one threshold value, the reception power is frequently judged

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