Reception circuit for a baseband processing and operation

Details Reception circuit for a baseband processing and operation Reception circuit for a baseband processing and operation

1994-12-20

1998-09-01

Chin, Wellington

Pulse or digital communications

Synchronizers

Frequency or phase control using synchronizing signal

375285, 375296, 370509, H04L 7033, H04L 2738, H04L 708, H04J 306

Patent

active

058021205

ABSTRACT:
In a reception circuit, a frame status signal indicating whether frame synchronization is established is output from a frame synchronizing circuit to a frame counter circuit. When the frame synchronization is established, a timing signal synchronized with a reception frame pulse is output from the frame counter circuit. When the frame synchronization is not established or out of synchronization, a built-in frame counter is operated in a flywheel mode to output a timing signal to synchronize a baseband circuit and an I/F buffer circuit, so that communication with an external circuit can be kept normal irrespective of presence or absence of frame synchronization.

REFERENCES:
patent: 4398291 (1983-08-01), Hotta et al.
patent: 4615040 (1986-09-01), Mojoli et al.
patent: 5592518 (1997-01-01), Davis et al.

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