Receiving circuit for demodulating an angle modulated signal

Demodulators – Frequency shift keying or minimum shift keying demodulator – Input signal combined with local oscillator or carrier...

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329307, 329308, 331 22, 331 23, 375 90, 375 97, 375120, H03D 300

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active

052606716

ABSTRACT:
A receiving circuit is designed for an MSK (Minimum Shift Keying) receiver and a QPSK (Quadrature Phase Shift Keying) receiver. The circuit provides a synchronous state determining device and a control voltage sweeping device for sweeping the output of a voltage oscillator. In the asynchronous state, a switch is turned off for interrupting a reproducing phase error signal so that the output of the voltage oscillator may be swept for causing the synchronous state. Then, the sweeping operation is stopped and the switch is turned on for controlling the voltage of the voltage controlled oscillator so that the low-frequency error component is removed from the phase error signal of the demodulating circuit. This results in implementing the simply-arranged demodulating circuit which keeps the proper demodulating performance against the shifted carrier frequency without any degrade and demodulates the input signal stably if the signal has a low C/N ratio. This circuit is capable of stably demodulating an MSK signal from a broadcasting satellite or a communication satellite.

REFERENCES:
patent: 4048566 (1977-09-01), Carson et al.
patent: 4527127 (1985-07-01), Brown
patent: 4642573 (1987-02-01), Noda et al.
patent: 4696056 (1987-09-01), Morita
patent: 4713630 (1987-12-01), Matthews
patent: 4871973 (1989-10-01), Yoshihara
patent: 4916405 (1990-04-01), Keate et al.
IETJ Technical Report vol. 11; No. 13; pp. 7-12; TEBS 87-24 Nov. 1987.

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