Receiving circuit and receiving system

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Nonlinear amplifying circuit

Reexamination Certificate

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Details

C327S052000

Reexamination Certificate

active

08063696

ABSTRACT:
An output circuit (12) converts a pair of current signals supplied to a pair of common nodes (NCa and NCb) into a pair of voltage signals (VOa and VOb). In each of input buffer circuits (11, 11, . . . ), a constant current generation section (101) generates, in an output mode, a pair of constant currents in a pair of current paths going from a pair of intermediate nodes (NMa and NMb) to a reference node (VDD1), and stops the generation of the pair of constant currents in a cutoff mode. A voltage-to-current conversion section (102) generates, in the output mode, a pair of input currents corresponding to a pair of input signals (Sa and Sb) in a pair of current paths going from the pair of intermediate nodes (NMa and NMb) to a reference node (GND) to thereby generate a pair of current signals (Ia and Ib) in a pair of current paths going from the pair of intermediate nodes (NMa and NMb) to the pair of common nodes (NCa and NCb), and stops the generation of the pair of input currents in the cutoff mode.

REFERENCES:
patent: 6211721 (2001-04-01), Smetana
patent: 6515518 (2003-02-01), Minegishi
patent: 6707321 (2004-03-01), Cho et al.
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patent: 7405622 (2008-07-01), Nishimura et al.
patent: 7622986 (2009-11-01), Pan et al.
patent: 7786764 (2010-08-01), Cheng
patent: 05-114846 (1992-05-01), None
patent: 04-170814 (1992-06-01), None
patent: 5-31361 (1993-04-01), None
patent: 10-285006 (1998-10-01), None
patent: 2001-168692 (2001-06-01), None
patent: 2007-274428 (2007-10-01), None
patent: WO 2007/114265 (2007-10-01), None

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