Receiving circuit

Details Receiving circuit Receiving circuit

2006-02-28

2006-02-28

Fan, Chieh M. (Department: 2638)

Pulse or digital communications

Receivers

C375S354000

Reexamination Certificate

active

07006582

ABSTRACT:
Disclosed herein is a receiving circuit comprising demodulator101which pulls in the phase of each of burst signals respectively having preambles701and711each storing phase information or data therein, synchronous pattern parts702and712each storing synchronous information therein, and data parts703and713each storing the data therein, and outputs data obtained by demodulating the burst signal, a controller110which performs counting based on the demodulated data to output a timing signal, and a storage unit102which stores or outputs the demodulated data, based on the timing signal.

REFERENCES:
patent: 5894328 (1999-04-01), Tahara et al.
patent: 6032033 (2000-02-01), Morris et al.
patent: 6282422 (2001-08-01), Aikawa et al.
patent: 6381289 (2002-04-01), Dutta
patent: 6633753 (2003-10-01), Kido
patent: 09-186667 (1997-07-01), None

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